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dvb_fpga

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Commit history

Commits included in published releases. Unpublished intermediate commits are private. Showing matches from the latest 100 commits ending at this release.

Fixed yosys synthesis script

suoto · May 25, 2026, 8:00 PM UTC

9dc990b0649c

Updated fpga_cores version

suoto · May 25, 2026, 7:52 PM UTC

5ab6f9631d92

Fixed incorrect net type in axi_bit_interleaver_tb

suoto · May 25, 2026, 7:49 PM UTC

d1f03e046288

Adding error types and mapping them to dvbs2_encoder_wrapper interrupt request

suoto · May 22, 2026, 7:33 PM UTC

1cb8f6581f21

Removed unused third_party/polyphase_filter from hdl_checker config

suoto · May 22, 2026, 7:29 PM UTC

0882ea23218e

Adding AGENTS.md

suoto · May 22, 2026, 7:29 PM UTC

4fef10bc6fa8

Rename decode to decode_config_tuple and update all call sites

suoto · May 16, 2026, 3:23 PM UTC

297a5b7e73d9

Updated fpga_cores to latest

suoto · May 16, 2026, 12:18 PM UTC

9925a7deac5b

Adding nvc support

suoto · May 16, 2026, 12:18 PM UTC

2b2f9421f031

Updated to latest fpga_cores

suoto · May 1, 2023, 8:35 AM UTC

3e3af09368f8

Changed metadata format to align with ETSI EN 302 307-1 Appendix I.2 -- Mode Adaptation input interface with in-band signalling.

suoto · Apr 30, 2023, 10:42 PM UTC

8391c5a78453

Updating LiteFuty block design

suoto · Jan 26, 2023, 9:54 PM UTC

a9055b98a15c

Added mising vhd file to yosys script

suoto · Jan 15, 2023, 12:49 AM UTC

f55877929986

Passing seed to constellation mapper individual runs

suoto · Jan 15, 2023, 12:10 AM UTC

e13b39aafbe2

AXI constellation mapper timing fixes

suoto · Jan 15, 2023, 12:08 AM UTC

0c11fef722b1

Split constellation mapper radius and IQ RAM interfaces

suoto · Jan 8, 2023, 5:01 PM UTC

00fc0ff4ccba

Added print_constellation_mapper_tables reference code

suoto · Jan 2, 2023, 8:23 PM UTC

53288e479c90

Fixed signal spy paths

suoto · Jan 2, 2023, 8:20 PM UTC

41942e2a80b7

Added toggling of tvalid/tready to dvbs2_encoder_tb

suoto · Jan 2, 2023, 8:19 PM UTC

7189c1e84659

Reduced AXI-Lite AxADDR widths

suoto · Jan 2, 2023, 8:14 PM UTC

3b1cd29ecd0e

Reading from constellation mapper returned the wrong values

suoto · Jan 2, 2023, 8:13 PM UTC

ce6917f6fcee

Disabled XDMA AXI-Lite prefetchable option

suoto · Dec 30, 2022, 6:15 PM UTC

986546dbcc20

Updated to fpga_cores latest

suoto · Nov 13, 2022, 1:30 PM UTC

7c8fd70d7ce5

Avoiding non one hot values in the axi_stream_mux selection mask

suoto · Nov 13, 2022, 1:29 PM UTC

8323dac72d51

Seed was not getting passed to dvbs2_encoder_tb

suoto · Oct 31, 2022, 6:22 PM UTC

2efc8b13cd05

Changed config tuple order

suoto · Oct 31, 2022, 4:41 PM UTC

773e9fe37bd6

Updating authors/copyright

suoto · May 6, 2022, 6:07 PM UTC

16b2da007136

Updating build files for LiteFury card

suoto · May 3, 2022, 5:13 PM UTC

65e87086bcc2

Removing references to polyphase filter

suoto · May 2, 2022, 6:56 PM UTC

acc5b1cdfa6a

Adding and mapping random seed to testbenches

suoto · May 2, 2022, 6:20 PM UTC

94a640dceaa4

Cleaning up code

suoto · Apr 30, 2022, 9:27 AM UTC

5d708aac4b1c

Moved extraction of config from data stream to a specific block

suoto · Apr 28, 2022, 8:48 PM UTC

b2b923215687

Merge remote-tracking branch 'origin/master'

suoto · Apr 26, 2022, 10:51 PM UTC

d9666ff1aba8

Added metadata insertion for dvbs2_encoder_wrapper test

suoto · Apr 26, 2022, 10:43 PM UTC

c2646945db98

Reverting incorrect GNU Radio input frame length change

suoto · Apr 16, 2022, 1:07 PM UTC

091df12a3b76

Fix frame sequence issue when consuming data too slowly

suoto · Apr 25, 2022, 10:49 PM UTC

180e52ab0806

Added extra debug registers

suoto · Apr 25, 2022, 5:42 PM UTC

14a5cbdbc36e

Bit interleaver relies on addr wrap around, depth must be a power of 2

suoto · Apr 24, 2022, 4:15 PM UTC

c352cc09f8ee

Added monitoring output of bit interleaver

suoto · Apr 24, 2022, 3:28 PM UTC

a7bdc11a0dd3

Fixed constellation mapper and other misc changes

suoto · Apr 24, 2022, 3:23 PM UTC

32a78872d186

Renamed 'not_set' enum name to 'unknown'

suoto · Apr 21, 2022, 6:54 PM UTC

98f2b8968d32

Need to use a single BB frame otherwise other tests fail

suoto · Apr 17, 2022, 5:56 PM UTC

728a0169e4be

Removed unnecessary axi debug instance

suoto · Apr 16, 2022, 7:53 PM UTC

330b7813191d

Fixed GHDL sim getting stuck

suoto · Apr 16, 2022, 7:52 PM UTC

ba8ae39ad8ff

Reverting incorrect GNU Radio input frame length change

suoto · Apr 16, 2022, 1:07 PM UTC

3fca2b6e8757

Using correct tlast to determine the first word received

suoto · Apr 15, 2022, 7:52 PM UTC

161ede114160

Merge remote-tracking branch 'origin/master' into pluto_sdr_trial

suoto · Apr 11, 2022, 11:18 AM UTC

5809b6932b10

Frame config is now embedded in the input data stream

suoto · Apr 10, 2022, 8:26 PM UTC

ae397ce7f3e7

Removed ployphase filter coefficients from register map

suoto · Apr 6, 2022, 6:23 PM UTC

2beda5070d84

WIP - removing polyphase filter from the encoder

suoto · Apr 2, 2022, 8:03 PM UTC

a0f89acb9361

Fixed input data filename in the dvbs2_encoder_tb

suoto · Mar 31, 2022, 5:29 PM UTC

da845c4a5cd5

Simplified/fixed CI scripts

suoto · Mar 31, 2022, 5:28 PM UTC

1187ed32f71f

Fixed 32APSK constellation scaling

suoto · Mar 31, 2022, 4:24 PM UTC

79c85595b6b5

Fixing CI run script

suoto · Mar 31, 2022, 3:43 PM UTC

342e6a6a73e7

Updating github CI hook

suoto · Mar 31, 2022, 3:30 PM UTC

a45433d64544

Updating run_tests.sh to use ghdl/vunit:llvm docker image

suoto · Mar 29, 2022, 8:43 PM UTC

6710a148881f

Updating FPGA cores repo

suoto · Mar 29, 2022, 8:39 PM UTC

dcab9de290f3

Python style fixes

suoto · Mar 29, 2022, 8:38 PM UTC

af50ae09581b

Updating flow diagram to GNU Radio 3.8+

suoto · Mar 29, 2022, 8:28 PM UTC

f1568b3b6fd1

Scaling modulator output/constellation mapper table

suoto · Mar 29, 2022, 8:23 PM UTC

980e76488eec

Moving custom docker image to Alpine Linux

suoto · Mar 29, 2022, 8:20 PM UTC

20db58aff772

Updating file names in the BB scrambler TB

suoto · Mar 27, 2022, 12:00 PM UTC

a1ecd5336c5b

Updating GR Python script to use 3.8+

suoto · Mar 27, 2022, 11:59 AM UTC

1f38e3dc5727

Improved error info on failed calls to GNU Radio script

Andre Souto · Mar 24, 2022, 12:49 PM UTC

025bbaeac4ca

Fixing yosys/ghdl issues

suoto · Mar 18, 2022, 10:37 AM UTC

9a07bd67c794

Merge branch 'master' into pluto_sdr_trial

suoto · Mar 18, 2022, 10:18 AM UTC

8e8812fb44d9

Adding bbframe length enforcer to handle more generic input streams

suoto · Mar 18, 2022, 10:15 AM UTC

87c4ef05caca

Hard wiring metadata to normal, QPSK, 2/3

suoto · Mar 3, 2022, 9:40 PM UTC

6086756d3a1c

Bypassing polyphase filter

suoto · Mar 3, 2022, 9:37 PM UTC

06cbc7cdd91c

Using ROM for constellation mapping

suoto · Mar 3, 2022, 9:10 PM UTC

0c625c3c3f28

Making metadata internal

suoto · Mar 3, 2022, 9:10 PM UTC

68f91e4af161

Link to zc706 block design was wrong

suoto · Jan 28, 2022, 10:25 AM UTC

0b482498f3ee

Working around GHDL issue (cannot handle IIR_KIND_INDEXED_NAME)

suoto · Jan 25, 2022, 12:21 AM UTC

e9efbf98a091

Script was incorrectly affecting all files in the project

suoto · Jan 18, 2022, 10:59 PM UTC

05f28550b878

LDPC encoder didn't handle slow input data properly

suoto · Oct 30, 2021, 1:42 PM UTC

438211ccde6a

Switching internals from big to little endianness

suoto · Oct 30, 2021, 1:41 PM UTC

ff32f66a56c6

Fixes to LiteFury board

suoto · Oct 30, 2021, 1:38 PM UTC

6a55201516a2

Data width and IQ width now both have generics

suoto · Oct 4, 2021, 8:51 PM UTC

d1a1cd73240f

Adding Vivado log/journal files to .gitignore

suoto · Oct 3, 2021, 12:22 PM UTC

a12b4252488a

Added LiteFury board; moved board build scripts to board/

suoto · Oct 3, 2021, 12:21 PM UTC

66ff9ba8ef6f

Minor code style changes

suoto · Sep 27, 2021, 8:06 PM UTC

ab116a061f25

AXI file compare complex now supports dumping multiple frames

suoto · Sep 27, 2021, 8:06 PM UTC

de61c7779b32

Removed code commited by mistake

suoto · Sep 27, 2021, 7:21 PM UTC

2118fd226377

Updating components status

suoto · Sep 27, 2021, 12:11 PM UTC

736a8bc70a62

Minor style fixes

suoto · Sep 26, 2021, 6:35 PM UTC

d249b466e62e

Using a separate FIFO for configuration

suoto · Sep 18, 2021, 2:23 PM UTC

940fa64dfdef

Adding readme for the ZC706 design

suoto · Aug 18, 2021, 7:02 PM UTC

d7b33e78d09a

Adding build scripts for ZC706 dev board

suoto · Aug 18, 2021, 6:22 PM UTC

924ad27c60c7

Updating fpga_cores

suoto · Jun 29, 2021, 8:57 PM UTC

c3fe650c5923

Fixed a combinatorial loop issue

suoto · Jun 29, 2021, 4:41 PM UTC

daeaa16228b6

Adapting to changes to fpga_cores

suoto · Jun 28, 2021, 11:52 AM UTC

d0c86387fa92

Path to constraints was not absoulte

suoto · Jun 28, 2021, 11:22 AM UTC

f9c46cade271

Changed license to CERN-OWH-W; renamed dvbs2_tx to dvbs2_encoder

suoto · Jun 19, 2021, 10:08 PM UTC

dc8a4cc17a2e

Added resource usage breakdown to README and minor tidy ups

suoto · Apr 4, 2021, 1:54 PM UTC

0cd693666699

Updating to fpga_cores/master

suoto · Mar 28, 2021, 12:41 AM UTC

c3e573d01efb

s_tdata with undefined was mistakenly passing

suoto · Mar 25, 2021, 3:37 PM UTC

12381026e13d

Polyphase coefficients are now generated alongside other sim files

suoto · Mar 25, 2021, 3:35 PM UTC

8aa961f1e39b

Changed polyphase filter number of taps to 33 (down from 101)

suoto · Mar 25, 2021, 2:27 PM UTC

e280668d71fb

Changing dvbs2_tx_tb output tolerance to 64 (from 1200)

suoto · Mar 25, 2021, 1:02 PM UTC

69c336a9726a

Renamed axi_file_compare_tolerance to axi_file_compare_complex

suoto · Mar 25, 2021, 12:55 PM UTC

3d7d51000484