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<header><h1 class="page-title">Brian Greenforest Builds Across The Whole Machine</h1></header>
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<p class="lead">Brian Greenforest turns hidden computational boundaries into working circuits, signal paths, spatial fabrics, browser-GPU machines, and product architectures.</p>
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<p class="about-profile__resume-note">Principal Hardware & Software Engineer · Remote · Washington State</p>
<p>Soviet aerospace education, decades of software engineering, Verilog and assembler, FPGA signal and protocol paths, browser-GPU systems, and hands-on physical design all converge on one practice: find where timing, state, routing, gain, or material behavior actually lives, then build the mechanism at that level.</p>
<p>Greenforest I/O names that engineering and invention practice and connects it to product development through Solid State Pros LLC.</p>
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<h2>One Builder, Complete Causal Paths</h2>
<p>Most technical organizations divide a machine at the same abstraction boundaries every time. Brian crosses those boundaries when the product demands it: from an RF threshold at a pin through logic and recovered audio, from an Ethernet frame through packet state and adjacent-device configuration, or from a browser texture through a new model of spatial computation.</p>
<p>The <a href="serial_multiplier/">bubbles-free bit-serial multiplier</a> exposes arithmetic scheduling clock by clock. The <a href="fpga-systems.html">FPGA systems</a> connect thresholded RF, quadrature logic, RMII Ethernet, packet state, RAM, and configuration pins. The <a href="webgl-glsl-computing.html">WebGL and GLSL machines</a> use textures and framebuffer passes as direct computing state. The <a href="cartilage/">Cartilage architecture</a> joins LUTs, drivers, distribution, state, timing, metal, composition, ownership, and runtime spatial replacement.</p>
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<h2>From Invention To An Engagement</h2>
<p><a href="https://www.solidstatepros.com/" target="_blank" rel="noopener">Solid State Pros LLC</a> carries the work into funded R&D, research architecture, product development, technical due diligence, and engineering roles.</p>
<p><strong>Start directly:</strong> <a href="mailto:brian@solidstatepros.com">brian@solidstatepros.com</a>.</p>
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<h2>The Primitive Pieces Connect Everything</h2>
<p>Local ownership, switching, routing, restoration, gain, fanout, state, configuration, and repeatable process form a common alphabet. Rebuilding systems from that alphabet reveals architectures that a fixed software or hardware stack cannot express.</p>
<p>Serial arithmetic, one-pin radio, direct Ethernet and ARP logic, cross-device FPGA reconfiguration, <a href="physical-mux-tiles/">physical MUX tiles</a>, browser-GPU cellular automata, <a href="cartilage-core.html">Cartilage reconfiguration</a>, Transformer training, wafer-diced chiplets, and magnetic circuits all grow from that move.</p>
<p><a href="210-problems-we-have-learned-to-call-normal.html">The 210-problem map</a> organizes the commercial reach into capability-native agency, live reconfigurable physical computation, and minimal-apparatus physical intelligence.</p>
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<h2>Public Mechanisms Create Momentum</h2>
<p>Circuits, source, measurements, images, training runs, articles, and historical records give engineers multiple ways to enter the work. A reader can trace a clock, run a shader, inspect an RTL path, assemble a logic tile, or develop the next architecture.</p>
<p>The strongest next step joins these mechanisms with funding, customers, collaborators, laboratory and fabrication access, or an institution ready to turn the research into widely useful systems.</p>
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<p>Turn the capability into a project:</p>
<a href="technology-research-and-consulting.html">Commission Research, Architecture, Or Product Development</a>
<p>Choose a focused route through R&D, architecture, implementation, collaboration, or a principal engineering role.</p>
<p>Open the mechanisms:</p>
<a href="proof-and-artifacts.html">Working Systems You Can Run And Inspect</a>
<p>Enter through circuits, browser machines, source, physical radio, and reconfigurable architecture.</p>
<a href="fpga-systems.html">FPGA Systems From Pins To Bitstreams</a>
<p>RF, Ethernet RTL, adjacent-device configuration, arithmetic, and tangible logic.</p>
<a href="/">Explore Greenforest I/O</a>
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