chapter5 · FPGA-Application-Development-and-Simulation · master | ThingAtlas

publicUnclaimed/

FPGA-Application-Development-and-Simulation

CloneStarsFork Build this

Design files

Name	Storage	Size
.. / Parent directory
chapter5.cr.mti	Git	3.9 KB
chapter5.mpf	Git	95.9 KB
counter.sv	Git	1.4 KB
iic_master_slave_test.sv

loywongadd missing ";" in memory.scala.b772052b4

Name	Storage	Size
.. / Parent directory
chapter5.cr.mti	Git	3.9 KB
chapter5.mpf	Git	95.9 KB
counter.sv	Git	1.4 KB
iic_master_slave_test.sv	Git	4.3 KB
iic_master.sv	Git	8.3 KB
iic_slave.sv	Git	5.7 KB
iis.sv	Git	3.1 KB
sim_iic_wave_detail.do	Git	5.2 KB
sim_spi_wave_detail.do	Git	3.8 KB
sim_spi_wave.do	Git	1.3 KB
sim_uart_wave.do	Git	4.7 KB
spi.sv	Git	7.6 KB
transcript	Git	70 B
uart.sv	Git	4.9 KB
vsim.wlf	Git	56.0 KB