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(pcb "/Users/ben/Library/Mobile Documents/com~apple~CloudDocs/PCBs/spork-8/RAM/RAM.dsn"
(parser
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(layer B.Cu
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(pin Oval[A]Pad_1700x1700_um 3 0 -5080)
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(pin Oval[A]Pad_1700x1700_um 13 0 -30480)
(pin Oval[A]Pad_1700x1700_um 14 0 -33020)
(pin Oval[A]Pad_1700x1700_um 15 0 -35560)
(pin Oval[A]Pad_1700x1700_um 16 0 -38100)
)
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(pin Rect[A]Pad_1600x1600_um 1 0 0)
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(pin Oval[A]Pad_1600x1600_um 3 5080 0)
(pin Oval[A]Pad_1600x1600_um 4 7620 0)
(pin Oval[A]Pad_1600x1600_um 5 10160 0)
(pin Oval[A]Pad_1600x1600_um 6 12700 0)
(pin Oval[A]Pad_1600x1600_um 7 15240 0)
(pin Oval[A]Pad_1600x1600_um 8 17780 0)
(pin Oval[A]Pad_1600x1600_um 9 20320 0)
)
(image "Package_DIP:DIP-28_W15.24mm_Socket"
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(pin Rect[A]Pad_1600x1600_um 1 0 0)
(pin Oval[A]Pad_1600x1600_um 2 0 -2540)
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(pin Oval[A]Pad_1600x1600_um 14 0 -33020)
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(pin Oval[A]Pad_1600x1600_um 16 15240 -30480)
(pin Oval[A]Pad_1600x1600_um 17 15240 -27940)
(pin Oval[A]Pad_1600x1600_um 18 15240 -25400)
(pin Oval[A]Pad_1600x1600_um 19 15240 -22860)
(pin Oval[A]Pad_1600x1600_um 20 15240 -20320)
(pin Oval[A]Pad_1600x1600_um 21 15240 -17780)
(pin Oval[A]Pad_1600x1600_um 22 15240 -15240)
(pin Oval[A]Pad_1600x1600_um 23 15240 -12700)
(pin Oval[A]Pad_1600x1600_um 24 15240 -10160)
(pin Oval[A]Pad_1600x1600_um 25 15240 -7620)
(pin Oval[A]Pad_1600x1600_um 26 15240 -5080)
(pin Oval[A]Pad_1600x1600_um 27 15240 -2540)
(pin Oval[A]Pad_1600x1600_um 28 15240 0)
)
(image "Package_DIP:DIP-20_W7.62mm"
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(pin Oval[A]Pad_1600x1600_um 18 7620 -5080)
(pin Oval[A]Pad_1600x1600_um 19 7620 -2540)
(pin Oval[A]Pad_1600x1600_um 20 7620 0)
)
(image updated_libs:318310200P1T
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(pin Round[A]Pad_1337_um (rotate 90) A1 0 0)
(pin Round[A]Pad_1337_um (rotate 90) A2 1000 2000)
(pin Round[A]Pad_1337_um (rotate 90) A3 2000 0)
(pin Round[A]Pad_1337_um (rotate 90) A4 3000 2000)
(pin Round[A]Pad_1337_um (rotate 90) A5 4000 0)
(pin Round[A]Pad_1337_um (rotate 90) A6 5000 2000)
(pin Round[A]Pad_1337_um (rotate 90) A7 6000 0)
(pin Round[A]Pad_1337_um (rotate 90) A8 7000 2000)
(pin Round[A]Pad_1337_um (rotate 90) A9 8000 0)
(pin Round[A]Pad_1337_um (rotate 90) A10 9000 2000)
(pin Round[A]Pad_1337_um (rotate 90) A11 10000 0)
(pin Round[A]Pad_1337_um (rotate 90) A12 13000 2000)
(pin Round[A]Pad_1337_um (rotate 90) A13 14000 0)
(pin Round[A]Pad_1337_um (rotate 90) A14 15000 2000)
(pin Round[A]Pad_1337_um (rotate 90) A15 16000 0)
(pin Round[A]Pad_1337_um (rotate 90) A16 17000 2000)
(pin Round[A]Pad_1337_um (rotate 90) A17 18000 0)
(pin Round[A]Pad_1337_um (rotate 90) A18 19000 2000)
(pin Round[A]Pad_1337_um (rotate 90) B1 0 -2500)
(pin Round[A]Pad_1337_um (rotate 90) B2 1000 -4500)
(pin Round[A]Pad_1337_um (rotate 90) B3 2000 -2500)
(pin Round[A]Pad_1337_um (rotate 90) B4 3000 -4500)
(pin Round[A]Pad_1337_um (rotate 90) B5 4000 -2500)
(pin Round[A]Pad_1337_um (rotate 90) B6 5000 -4500)
(pin Round[A]Pad_1337_um (rotate 90) B7 6000 -2500)
(pin Round[A]Pad_1337_um (rotate 90) B8 7000 -4500)
(pin Round[A]Pad_1337_um (rotate 90) B9 8000 -2500)
(pin Round[A]Pad_1337_um (rotate 90) B10 9000 -4500)
(pin Round[A]Pad_1337_um (rotate 90) B11 10000 -2500)
(pin Round[A]Pad_1337_um (rotate 90) B12 13000 -4500)
(pin Round[A]Pad_1337_um (rotate 90) B13 14000 -2500)
(pin Round[A]Pad_1337_um (rotate 90) B14 15000 -4500)
(pin Round[A]Pad_1337_um (rotate 90) B15 16000 -2500)
(pin Round[A]Pad_1337_um (rotate 90) B16 17000 -4500)
(pin Round[A]Pad_1337_um (rotate 90) B17 18000 -2500)
(pin Round[A]Pad_1337_um (rotate 90) B18 19000 -4500)
(keepout "" (circle F.Cu 2900 11650 -1250))
(keepout "" (circle B.Cu 2900 11650 -1250))
(keepout "" (circle F.Cu 2900 20800 -1250))
(keepout "" (circle B.Cu 2900 20800 -1250))
)
(image "Package_DIP:DIP-14_W7.62mm"
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(outline (path signal 50 8700 1550 -1100 1550))
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(pin Rect[A]Pad_1600x1600_um 1 0 0)
(pin Oval[A]Pad_1600x1600_um 2 0 -2540)
(pin Oval[A]Pad_1600x1600_um 3 0 -5080)
(pin Oval[A]Pad_1600x1600_um 4 0 -7620)
(pin Oval[A]Pad_1600x1600_um 5 0 -10160)
(pin Oval[A]Pad_1600x1600_um 6 0 -12700)
(pin Oval[A]Pad_1600x1600_um 7 0 -15240)
(pin Oval[A]Pad_1600x1600_um 8 7620 -15240)
(pin Oval[A]Pad_1600x1600_um 9 7620 -12700)
(pin Oval[A]Pad_1600x1600_um 10 7620 -10160)
(pin Oval[A]Pad_1600x1600_um 11 7620 -7620)
(pin Oval[A]Pad_1600x1600_um 12 7620 -5080)
(pin Oval[A]Pad_1600x1600_um 13 7620 -2540)
(pin Oval[A]Pad_1600x1600_um 14 7620 0)
)
(padstack Round[A]Pad_1337_um
(shape (circle F.Cu 1337))
(shape (circle B.Cu 1337))
(attach off)
)
(padstack Round[A]Pad_1600_um
(shape (circle F.Cu 1600))
(shape (circle B.Cu 1600))
(attach off)
)
(padstack Round[A]Pad_1800_um
(shape (circle F.Cu 1800))
(shape (circle B.Cu 1800))
(attach off)
)
(padstack Round[A]Pad_3800_um
(shape (circle F.Cu 3800))
(shape (circle B.Cu 3800))
(attach off)
)
(padstack Oval[A]Pad_1600x1600_um
(shape (path F.Cu 1600 0 0 0 0))
(shape (path B.Cu 1600 0 0 0 0))
(attach off)
)
(padstack Oval[A]Pad_1700x1700_um
(shape (path F.Cu 1700 0 0 0 0))
(shape (path B.Cu 1700 0 0 0 0))
(attach off)
)
(padstack Rect[A]Pad_1600x1600_um
(shape (rect F.Cu -800 -800 800 800))
(shape (rect B.Cu -800 -800 800 800))
(attach off)
)
(padstack Rect[A]Pad_1700x1700_um
(shape (rect F.Cu -850 -850 850 850))
(shape (rect B.Cu -850 -850 850 850))
(attach off)
)
(padstack Rect[A]Pad_1800x1800_um
(shape (rect F.Cu -900 -900 900 900))
(shape (rect B.Cu -900 -900 900 900))
(attach off)
)
(padstack "Via[0-1]_800:400_um"
(shape (circle F.Cu 800))
(shape (circle B.Cu 800))
(attach off)
)
)
(network
(net GND
(pins C1-2 C2-2 J1-1 J2-16 RN1-1 U1-14 U3-10 C3-2 RN2-1 J5-A3 J5-A18 J5-B3 J5-B18
U4-4 U4-5 U4-7 U4-12 U4-13 U2-7 U2-8 U2-9 U2-11 U2-12 C4-2)
)
(net VCC
(pins C1-1 C2-1 J1-2 J2-15 U1-28 U3-20 C3-1 J5-A2 J5-A12 J5-B1 J5-B2 J5-B12
U4-14 U2-14 C4-1)
)
(net "Net-(D1-K)"
(pins D1-1 RN1-9)
)
(net "Net-(D1-A)"
(pins D1-2 U1-19 U3-9 RN2-2 J5-B16)
)
(net "Net-(D2-K)"
(pins D2-1 RN1-8)
)
(net "Net-(D2-A)"
(pins D2-2 U1-18 U3-8 RN2-3 J5-B15)
)
(net "Net-(D3-K)"
(pins D3-1 RN1-7)
)
(net "Net-(D3-A)"
(pins D3-2 U1-17 U3-7 RN2-4 J5-B14)
)
(net "Net-(D4-K)"
(pins D4-1 RN1-6)
)
(net "Net-(D4-A)"
(pins D4-2 U1-16 U3-6 RN2-5 J5-B13)
)
(net "Net-(D5-K)"
(pins D5-1 RN1-5)
)
(net "Net-(D5-A)"
(pins D5-2 U1-15 U3-5 RN2-6 J5-A16)
)
(net "Net-(D6-K)"
(pins D6-1 RN1-4)
)
(net "Net-(D6-A)"
(pins D6-2 U1-13 U3-4 RN2-7 J5-A15)
)
(net "Net-(D7-K)"
(pins D7-1 RN1-3)
)
(net "Net-(D7-A)"
(pins D7-2 U1-12 U3-3 RN2-8 J5-A14)
)
(net "Net-(D8-K)"
(pins D8-1 RN1-2)
)
(net "Net-(D8-A)"
(pins D8-2 U1-11 U3-2 RN2-9 J5-A13)
)
(net BUS7
(pins J1-16 J2-1 U3-11)
)
(net BUS6
(pins J1-15 J2-2 U3-12)
)
(net BUS5
(pins J1-14 J2-3 U3-13)
)
(net BUS4
(pins J1-13 J2-4 U3-14)
)
(net BUS3
(pins J1-12 J2-5 U3-15)
)
(net BUS2
(pins J1-11 J2-6 U3-16)
)
(net BUS1
(pins J1-10 J2-7 U3-17)
)
(net BUS0
(pins J1-9 J2-8 U3-18)
)
(net SIG1
(pins J1-8 J2-9)
)
(net SIG0
(pins J1-7 J2-10)
)
(net SIG_IN
(pins J1-6 J2-11 U1-22 J5-B11 U4-2 U2-2 U2-3 U2-5)
)
(net SIG_OUT
(pins J1-5 J2-12 U2-6)
)
(net CLOCK
(pins J1-4 J2-13 U4-1)
)
(net RESET
(pins J1-3 J2-14)
)
(net A0
(pins J3-16 J4-1 U1-10 J5-A4)
)
(net A1
(pins J3-15 J4-2 U1-9 J5-A5)
)
(net A2
(pins J3-14 J4-3 U1-8 J5-A6)
)
(net A3
(pins J3-13 J4-4 U1-7 J5-A7)
)
(net A4
(pins J3-12 J4-5 U1-6 J5-A8)
)
(net A5
(pins J3-11 J4-6 U1-5 J5-A9)
)
(net A6
(pins J3-10 J4-7 U1-4 J5-A10)
)
(net A7
(pins J3-9 J4-8 U1-3 J5-A11)
)
(net A8
(pins J3-8 J4-9 U1-25 J5-B4)
)
(net A9
(pins J3-7 J4-10 U1-24 J5-B5)
)
(net A10
(pins J3-6 J4-11 U1-21 J5-B6)
)
(net A11
(pins J3-5 J4-12 U1-23 J5-B7)
)
(net A12
(pins J3-4 J4-13 U1-2 J5-B8)
)
(net A13
(pins J3-3 J4-14 U1-26 J5-B9)
)
(net A14
(pins J3-2 J4-15 U1-1 J5-B10)
)
(net A15
(pins J3-1 J4-16 U1-20 U4-9 U4-10)
)
(net "~{SIG_IN}"
(pins U3-1 U2-1)
)
(net "~{ENABLE}"
(pins U3-19 U2-4)
)
(net "unconnected-(U2-Pad10)"
(pins U2-10)
)
(net "unconnected-(U2-Pad13)"
(pins U2-13)
)
(net "~{WE_CLOCK}"
(pins U1-27 J5-A17 U4-3)
)
(net "unconnected-(U4-Pad6)"
(pins U4-6)
)
(net "unconnected-(U4-Pad11)"
(pins U4-11)
)
(net "~{CART_CS}"
(pins J5-A1 J5-B17 U4-8)
)
(class kicad_default "" A0 A1 A10 A11 A12 A13 A14 A15 A2 A3 A4 A5 A6 A7
A8 A9 BUS0 BUS1 BUS2 BUS3 BUS4 BUS5 BUS6 BUS7 CLOCK GND "Net-(D1-A)"
"Net-(D1-K)" "Net-(D2-A)" "Net-(D2-K)" "Net-(D3-A)" "Net-(D3-K)" "Net-(D4-A)"
"Net-(D4-K)" "Net-(D5-A)" "Net-(D5-K)" "Net-(D6-A)" "Net-(D6-K)" "Net-(D7-A)"
"Net-(D7-K)" "Net-(D8-A)" "Net-(D8-K)" RESET SIG0 SIG1 SIG_IN SIG_OUT
VCC "unconnected-(U2-Pad10)" "unconnected-(U2-Pad13)" "unconnected-(U4-Pad11)"
"unconnected-(U4-Pad6)" "~{CART_CS}" "~{ENABLE}" "~{SIG_IN}" "~{WE_CLOCK}"
(circuit
(use_via Via[0-1]_800:400_um)
)
(rule
(width 250)
(clearance 200.1)
)
)
)
(wiring
)
)
0b87c4a36This file is pinned to the selected release. Download the original to open it in your design tool.