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<?xml version="1.0" encoding="UTF-8"?>
<spirit:component xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<spirit:vendor>xilinx.com</spirit:vendor>
<spirit:library>user</spirit:library>
<spirit:name>RSD</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:busInterfaces>
<spirit:busInterface>
<spirit:name>axi4LitePsToPlControlRegisterIF_S_AXI</spirit:name>
<spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_rtl" spirit:version="1.0"/>
<spirit:slave>
<spirit:memoryMapRef spirit:memoryMapRef="axi4LitePsToPlControlRegisterIF_S_AXI"/>
</spirit:slave>
<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>AWADDR</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4LitePsToPlControlRegisterIF_S_AXI_AWADDR</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>AWPROT</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4LitePsToPlControlRegisterIF_S_AXI_AWPROT</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>AWVALID</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4LitePsToPlControlRegisterIF_S_AXI_AWVALID</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>AWREADY</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4LitePsToPlControlRegisterIF_S_AXI_AWREADY</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>WDATA</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4LitePsToPlControlRegisterIF_S_AXI_WDATA</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>WSTRB</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4LitePsToPlControlRegisterIF_S_AXI_WSTRB</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>WVALID</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4LitePsToPlControlRegisterIF_S_AXI_WVALID</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>WREADY</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4LitePsToPlControlRegisterIF_S_AXI_WREADY</spirit:name>
</spirit:physicalPort>
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<spirit:portMap>
<spirit:logicalPort>
<spirit:name>BRESP</spirit:name>
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<spirit:physicalPort>
<spirit:name>axi4LitePsToPlControlRegisterIF_S_AXI_BRESP</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>BVALID</spirit:name>
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<spirit:name>axi4LitePsToPlControlRegisterIF_S_AXI_BVALID</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>BREADY</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4LitePsToPlControlRegisterIF_S_AXI_BREADY</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>ARADDR</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4LitePsToPlControlRegisterIF_S_AXI_ARADDR</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>ARPROT</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4LitePsToPlControlRegisterIF_S_AXI_ARPROT</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>ARVALID</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4LitePsToPlControlRegisterIF_S_AXI_ARVALID</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>ARREADY</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4LitePsToPlControlRegisterIF_S_AXI_ARREADY</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>RDATA</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4LitePsToPlControlRegisterIF_S_AXI_RDATA</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>RRESP</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4LitePsToPlControlRegisterIF_S_AXI_RRESP</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>RVALID</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4LitePsToPlControlRegisterIF_S_AXI_RVALID</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>RREADY</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4LitePsToPlControlRegisterIF_S_AXI_RREADY</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>axi4MemoryIF_M_AXI</spirit:name>
<spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_rtl" spirit:version="1.0"/>
<spirit:master>
<spirit:addressSpaceRef spirit:addressSpaceRef="axi4MemoryIF_M_AXI"/>
</spirit:master>
<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>AWID</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_AWID</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>AWADDR</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_AWADDR</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>AWLEN</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_AWLEN</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>AWSIZE</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_AWSIZE</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>AWBURST</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_AWBURST</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>AWLOCK</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_AWLOCK</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>AWCACHE</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_AWCACHE</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>AWPROT</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_AWPROT</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>AWQOS</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_AWQOS</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>AWUSER</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_AWUSER</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>AWVALID</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_AWVALID</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>AWREADY</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_AWREADY</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>WDATA</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_WDATA</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>WSTRB</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_WSTRB</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>WLAST</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_WLAST</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>WUSER</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_WUSER</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>WVALID</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_WVALID</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>WREADY</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_WREADY</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>BID</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_BID</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>BRESP</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_BRESP</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>BUSER</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_BUSER</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>BVALID</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_BVALID</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>BREADY</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_BREADY</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>ARID</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_ARID</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>ARADDR</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_ARADDR</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>ARLEN</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_ARLEN</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>ARSIZE</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_ARSIZE</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>ARBURST</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_ARBURST</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>ARLOCK</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_ARLOCK</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>ARCACHE</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_ARCACHE</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>ARPROT</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_ARPROT</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>ARQOS</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_ARQOS</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>ARUSER</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_ARUSER</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>ARVALID</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_ARVALID</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>ARREADY</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_ARREADY</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>RID</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_RID</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>RDATA</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_RDATA</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>RRESP</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_RRESP</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>RLAST</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_RLAST</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>RUSER</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_RUSER</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>RVALID</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_RVALID</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>RREADY</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_RREADY</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>axi4LitePlToPsControlRegisterIF_S_AXI_ARESETN</spirit:name>
<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset" spirit:version="1.0"/>
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset_rtl" spirit:version="1.0"/>
<spirit:slave/>
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<spirit:portMap>
<spirit:logicalPort>
<spirit:name>RST</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4LitePlToPsControlRegisterIF_S_AXI_ARESETN</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
<spirit:parameters>
<spirit:parameter>
<spirit:name>POLARITY</spirit:name>
<spirit:value spirit:id="BUSIFPARAM_VALUE.AXI4LITEPLTOPSCONTROLREGISTERIF_S_AXI_ARESETN.POLARITY" spirit:choiceRef="choice_list_9d8b0d81">ACTIVE_LOW</spirit:value>
</spirit:parameter>
</spirit:parameters>
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>axi4LitePsToPlControlRegisterIF_S_AXI_ARESETN</spirit:name>
<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset" spirit:version="1.0"/>
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset_rtl" spirit:version="1.0"/>
<spirit:slave/>
<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>RST</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4LitePsToPlControlRegisterIF_S_AXI_ARESETN</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
<spirit:parameters>
<spirit:parameter>
<spirit:name>POLARITY</spirit:name>
<spirit:value spirit:id="BUSIFPARAM_VALUE.AXI4LITEPSTOPLCONTROLREGISTERIF_S_AXI_ARESETN.POLARITY" spirit:choiceRef="choice_list_9d8b0d81">ACTIVE_LOW</spirit:value>
</spirit:parameter>
</spirit:parameters>
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>axi4MemoryIF_M_AXI_ARESETN</spirit:name>
<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset" spirit:version="1.0"/>
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset_rtl" spirit:version="1.0"/>
<spirit:slave/>
<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>RST</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4MemoryIF_M_AXI_ARESETN</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
<spirit:parameters>
<spirit:parameter>
<spirit:name>POLARITY</spirit:name>
<spirit:value spirit:id="BUSIFPARAM_VALUE.AXI4MEMORYIF_M_AXI_ARESETN.POLARITY" spirit:choiceRef="choice_list_9d8b0d81">ACTIVE_LOW</spirit:value>
</spirit:parameter>
</spirit:parameters>
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>axi4LitePlToPsControlRegisterIF_S_AXI_ACLK</spirit:name>
<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
<spirit:slave/>
<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>CLK</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4LitePlToPsControlRegisterIF_S_AXI_ACLK</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
<spirit:parameters>
<spirit:parameter>
<spirit:name>ASSOCIATED_RESET</spirit:name>
<spirit:value spirit:id="BUSIFPARAM_VALUE.AXI4LITEPLTOPSCONTROLREGISTERIF_S_AXI_ACLK.ASSOCIATED_RESET">axi4LitePlToPsControlRegisterIF_S_AXI_ARESETN</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>ASSOCIATED_BUSIF</spirit:name>
<spirit:value spirit:id="BUSIFPARAM_VALUE.AXI4LITEPLTOPSCONTROLREGISTERIF_S_AXI_ACLK.ASSOCIATED_BUSIF">axi4LitePlToPsControlRegisterIF_S_AXI</spirit:value>
</spirit:parameter>
</spirit:parameters>
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>axi4LitePsToPlControlRegisterIF_S_AXI_ACLK</spirit:name>
<spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
<spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
<spirit:slave/>
<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>CLK</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>axi4LitePsToPlControlRegisterIF_S_AXI_ACLK</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
<spirit:parameters>
<spirit:parameter>
<spirit:name>ASSOCIATED_BUSIF</spirit:name>
<spirit:value spirit:id="BUSIFPARAM_VALUE.AXI4LITEPSTOPLCONTROLREGISTERIF_S_AXI_ACLK.ASSOCIATED_BUSIF">axi4LitePsToPlControlRegisterIF_S_AXI</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>ASSOCIATED_RESET</spirit:name>
<spirit:value spirit:id="BUSIFPARAM_VALUE.AXI4LITEPSTOPLCONTROLREGISTERIF_S_AXI_ACLK.ASSOCIATED_RESET">axi4LitePsToPlControlRegisterIF_S_AXI_ARESETN</spirit:value>
</spirit:parameter>
</spirit:parameters>
</spirit:busInterface>
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