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riscv-boom

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Commit history

Commits included in published releases. Unpublished intermediate commits are private. Showing matches from the latest 100 commits ending at this release.

[iss] Move simple ALU uops to a new issue queue.

Christopher Celio · Apr 18, 2018, 5:14 AM UTC

3e37101cd3c3

[refactor] Fix imports in src/test.

Christopher Celio · Apr 17, 2018, 5:29 PM UTC

fc688ff271d3

[refactor] Each directory is a separate package.

Christopher Celio · Apr 17, 2018, 12:06 AM UTC

5c26a37c4c98

[icache] Now supports unbanked I$ again.

Christopher Celio · Apr 11, 2018, 4:42 AM UTC

89b19d9b6649

[icache] Now supports fetching 2x TL refill width.

Christopher Celio · Apr 11, 2018, 2:38 AM UTC

ee9deeb4d6ce

[fetch] Now supports banked I$ fetching.

Christopher Celio · Apr 9, 2018, 11:51 PM UTC

29d27e37a3ce

[icache] Provide banked fetch if FB>8.

Christopher Celio · Apr 6, 2018, 1:42 AM UTC

733ef4263d06

[fetch] Fork rocket icache.

Christopher Celio · Apr 4, 2018, 6:59 AM UTC

86796d9ee1bb

[system] Now properly generates rv64um-p tests.

Christopher Celio · Apr 3, 2018, 6:31 PM UTC

d78f18eca2f2

[sbt] Add compilerPlugin for macros.

Christopher Celio · Apr 1, 2018, 3:19 AM UTC

0767312e558e

[fetch] Add back in asserts in fetchmonitor.

Christopher Celio · Mar 30, 2018, 2:53 AM UTC

f6e18caa61b0

[fetch] clean up.

Christopher Celio · Mar 30, 2018, 1:11 AM UTC

1c10e948462f

[fetch] Bypass enq to deq flops if fetchbuffer empty.

Christopher Celio · Mar 29, 2018, 2:43 AM UTC

fa93eda235f4

[fetch] Flop FetchBuffer output.

Christopher Celio · Mar 24, 2018, 9:07 AM UTC

17bd31a87936

[fetch] Added Monitor for FetchBuffer outputs.

Christopher Celio · Mar 23, 2018, 9:01 AM UTC

259fc4decc6a

[fetch] refactor fetchbuffer logic.

Christopher Celio · Mar 20, 2018, 5:11 AM UTC

acdaf6df4bee

[fetch] Shift incoming uops towards 0.

Christopher Celio · Mar 20, 2018, 3:27 AM UTC

3d672cfc4c3d

[fetch] Now support N:M fetch:decode widths.

Christopher Celio · Mar 20, 2018, 12:40 AM UTC

2d6efeca5208

[fetch] Progress towards decoupling FE and BE.

Christopher Celio · Mar 19, 2018, 8:08 AM UTC

eaf5306a7dd8

[fetch] Add FetchBuffer module; remove serializer.

Christopher Celio · Mar 15, 2018, 9:57 PM UTC

2c9ec840bc85

[chisel3] Tie off any dangling I/Os in CoreIO.

Christopher Celio · Mar 15, 2018, 7:34 PM UTC

05451a5238c6

[chisel3] BitPat.DC -> BitPat.dontCare.

Christopher Celio · Mar 15, 2018, 7:34 PM UTC

6d084f93cd4c

[refactor] Rename IFU blocks; remove vestigial brinfo.

Christopher Celio · Mar 15, 2018, 6:57 PM UTC

0d163f1812a4

[fetch] Refactor fetch module hierarchy.

Christopher Celio · Mar 14, 2018, 4:48 AM UTC

78d9b0c7fb76

[chisel3] Add Invalidate APIs, fix deprecation warnings.

Christopher Celio · Mar 13, 2018, 11:06 PM UTC

6b193c55ae95

[chisel3] Make I/O parameters visible for cloning.

Christopher Celio · Mar 13, 2018, 11:04 PM UTC

57f85ce595d7

[chisel3] Begin using invalidateAPI. Fix bug found.

Christopher Celio · Mar 13, 2018, 11:02 PM UTC

96695bcff99f

[chisel3] change != to =/=.

Christopher Celio · Mar 13, 2018, 11:02 PM UTC

5d120a9bcbcf

[imul] Convert to chisel3.

Christopher Celio · Mar 13, 2018, 9:33 PM UTC

f3b367f6f586

[bpd] Fix error in history tracking.

Christopher Celio · Mar 13, 2018, 7:23 AM UTC

8e859f1c668d

[btb] Fix oopsie.

Christopher Celio · Mar 13, 2018, 7:17 AM UTC

11952278f17a

[ma_fetch] Temporary HACK to address ma_fetch.

Christopher Celio · Mar 12, 2018, 8:03 AM UTC

b422205a68f9

[readme] Update README.

Christopher Celio · Mar 12, 2018, 6:54 AM UTC

0cea5d8eec55

Update to new RocketChip BusWrapper API.

Christopher Celio · Mar 12, 2018, 5:00 AM UTC

b54c311ea01c

[readme] Update README.

Christopher Celio · Mar 12, 2018, 1:42 AM UTC

2712113a4e51

Bump to latest rocket-chip master tested with rocket-chip a48dd575b23aa4b82368f19beaaf19e2d4bf1e3e

pentin-as · Mar 1, 2018, 7:07 AM UTC

b077821837d3

Merge pull request #64 from ucb-bar/dev-fetch4

Christopher Celio · Mar 12, 2018, 12:09 AM UTC

5ce952350c31

Merge branch 'master' into dev-fetch4

Christopher Celio · Mar 12, 2018, 12:07 AM UTC

ab2515c4adf4

[bpd] Fix error in hash functions.

Christopher Celio · Mar 11, 2018, 7:41 AM UTC

3f34cf301003

[bpd] Restructured how TAGE predicts.

Christopher Celio · Mar 11, 2018, 12:32 AM UTC

29cd96ae4c09

[bpd] TAGE does things again. Also reset tables.

Christopher Celio · Mar 9, 2018, 8:37 PM UTC

32c7955de4e9

[tage] work-in-progress clean-up.

Christopher Celio · Mar 7, 2018, 7:20 AM UTC

3b176d8e4b8b

[bpd] Touch up branch predictor.

Christopher Celio · Mar 6, 2018, 8:20 AM UTC

d6db353a83a5

[gshare] improved bpd.

Christopher Celio · Mar 6, 2018, 7:46 AM UTC

99f3620f6939

[fetch] Supress btb.resp.valid if no I$ response.

Christopher Celio · Mar 5, 2018, 8:31 PM UTC

2bc439136783

[fetch] remove queue from I$'s response path.

Christopher Celio · Mar 5, 2018, 6:02 PM UTC

23ef645cb72e

[bpd] Add an Elastic SRAM module.

Christopher Celio · Mar 5, 2018, 6:56 AM UTC

9458050155c9

[gshare] Now updates.

Christopher Celio · Mar 4, 2018, 9:12 AM UTC

87dc60028b95

[bpd] Now compiles, FTQ sends udpates to BPD.

Christopher Celio · Mar 4, 2018, 5:14 AM UTC

6fc3409a9f1d

[bpd] Add back history; begin refactoring BPD.

Christopher Celio · Mar 2, 2018, 6:53 AM UTC

effa60027e2a

[bpd] Add a base-line, history-less predictor.

Christopher Celio · Feb 27, 2018, 12:41 AM UTC

7de3b8f5e5aa

[fetch] Fix priority between F2 and F4 redirects.

Christopher Celio · Feb 23, 2018, 5:46 AM UTC

b9356d350c63

[fetch] Verified BIM/BTB/FTQ logic.

Christopher Celio · Feb 23, 2018, 2:54 AM UTC

d80a8552efb8

[btb] Fix bug (use BIM to compute cfi_idx).

Christopher Celio · Feb 21, 2018, 11:27 PM UTC

fe9deb1ece07

[fetch] Add new BIM in, connected to FTQ.

Christopher Celio · Feb 18, 2018, 8:59 AM UTC

327575631ef7

[bpd] Remove BROB, simplify histories (for now).

Christopher Celio · Feb 17, 2018, 11:50 PM UTC

c8ac3331d7ab

[rob] Refactor ROB, remove vestigial BROB/PC code.

Christopher Celio · Feb 17, 2018, 11:04 PM UTC

cd2574e229ea

[fetch] FTQ now handles all PC storage.

Christopher Celio · Feb 16, 2018, 6:42 AM UTC

403dc2204fe0

[fetch] FTQ now provides PC for flushes/replays.

Christopher Celio · Feb 16, 2018, 12:32 AM UTC

77e06a592754

[fetch] Fix FTQ enq_ptr bug re: br_mispredicts.

Christopher Celio · Feb 15, 2018, 6:25 AM UTC

b601e55dde25

[fetch] FTQ now gives PC info to BRU.

Christopher Celio · Feb 15, 2018, 2:27 AM UTC

4e03b280e142

[fetch] Fix FTQ empty/full logic.

Christopher Celio · Feb 14, 2018, 11:06 PM UTC

54ceee453c7d

[fetch] FTQ now tracks miss info.

Christopher Celio · Feb 14, 2018, 8:34 PM UTC

cf7b2d33826c

[fetch] FTQ hooked up, showing signs of life.

Christopher Celio · Feb 14, 2018, 7:02 AM UTC

412ad7999dcd

[fetch] Add skeletons of BIM and FTQ.

Christopher Celio · Feb 11, 2018, 9:34 PM UTC

adf2745316c3

[fetch] Change F3 stage to use ElasticReg.

Christopher Celio · Feb 8, 2018, 12:32 AM UTC

756b708f693b

[fetch] Move branch-check back a stage.

Christopher Celio · Feb 6, 2018, 8:16 AM UTC

fe6e4888afa5

[unittest] Add example of unittesting a Module.

Christopher Celio · Feb 5, 2018, 9:50 PM UTC

e88fb533af71

WIP on 1-cycle BTB, 4-cycle BPD.

Christopher Celio · Jan 18, 2018, 5:54 PM UTC

29e97a02f668

Merge pull request #54 from pentin-as/template

Christopher Celio · Jan 11, 2018, 7:53 AM UTC

1373dc5d3b8b

Bump to latest rocket-chip master tested with rocket-chip f5211765e9c43bc32401027509f5a18e6f017af7 dated January 10, 2018

pentin-as · Jan 10, 2018, 7:16 AM UTC

931fa795a013

Merge pull request #1 from ucb-bar/template

pentin-as · Jan 10, 2018, 4:20 AM UTC

e71d2195a3c1

No duplication of code with Rocket in ScratchpadSlavePort

pentin-as · Dec 18, 2017, 7:40 AM UTC

71a1c0dc604f

No duplication of code with Rocket in Frontend

pentin-as · Dec 17, 2017, 12:14 PM UTC

01f3256f27f1

[sync] Changes for sync BOOM with freechipsproject/rocket-chip@b8098d1

Alexander Vagin · Dec 2, 2017, 11:25 AM UTC

6773057b37a3

Add JTAG Config targets.

Christopher Celio · Nov 28, 2017, 1:29 AM UTC

52b2bda293ca

Bump to latest rocket-chip master.

Christopher Celio · Nov 28, 2017, 1:29 AM UTC

53b805546c47

Fix ecall bug in which epc was incorrectly set.

Christopher Celio · Nov 22, 2017, 10:21 PM UTC

5af8a18350b5

[fdiv] fix NaN bug in fdiv interactions.

Christopher Celio · Nov 21, 2017, 11:11 PM UTC

9fd9794ab705

[fpu] FP-to-Int commit log now works.

Christopher Celio · Nov 20, 2017, 8:04 AM UTC

ad43863dbe0c

[fpu] add asserts, maybe? add FP commit logging.

Christopher Celio · Nov 20, 2017, 7:09 AM UTC

6d6603d79117

Change where illegal insn badaddr is handled.

Christopher Celio · Nov 18, 2017, 6:50 AM UTC

fc9b172c2856

Illegal instructions now write 0 to mtval.

Christopher Celio · Nov 18, 2017, 6:12 AM UTC

2b613965dbe7

Update BOOM to latest rocket-chip.

Christopher Celio · Nov 17, 2017, 12:02 AM UTC

ac7c35c5d4e0

Fix initialization bug in Rename.

Christopher Celio · Nov 8, 2017, 12:49 AM UTC

9d34962ed9fb

Update MegaBoomConfig.

Christopher Celio · Nov 7, 2017, 12:16 AM UTC

1eb08e0d4c98

Update README.md

Christopher Celio · Nov 6, 2017, 7:31 AM UTC

497f1366522b

Update README.

Christopher Celio · Nov 6, 2017, 7:03 AM UTC

26cb59478085

Passes all tests; code moved into sub-directories.

Christopher Celio · Nov 6, 2017, 5:22 AM UTC

66eb047063e5

Work in progress refactor to new code setup.

Christopher Celio · Nov 5, 2017, 7:39 PM UTC

7ad20052504a

Add SiFive license.

Christopher Celio · Nov 5, 2017, 7:29 PM UTC

c8d48f26c186

Fix breakpoint setting EPC correctly.

Christopher Celio · Nov 2, 2017, 2:17 AM UTC

71146913dc04

[btb] explicitly disable BTB for now.

Christopher Celio · Oct 30, 2017, 10:44 PM UTC

ebbfee5208ef

Update to latest rocket-chip master.

Christopher Celio · Oct 28, 2017, 7:24 PM UTC

98bae1f6b066

[config] Widen Systembus to 16 bytes for BOOM-4w.

Christopher Celio · Oct 25, 2017, 3:46 AM UTC

6605572ab7b8

Fix superscalar decode/CSR interaction.

Christopher Celio · Oct 25, 2017, 1:30 AM UTC

eebc0ddabd02

Update README.md

Christopher Celio · Oct 24, 2017, 3:24 PM UTC

3eb9560e93b6

[readme] update readme with RV64G instructions.

Christopher Celio · Oct 21, 2017, 12:03 AM UTC

46aef9afae84

Fix WFI/watchdog timer interaction.

Christopher Celio · Oct 20, 2017, 11:49 PM UTC

d7b9cfa83c36

Fix compile error because I'm dumb.

Christopher Celio · Oct 20, 2017, 9:03 PM UTC

1e6732a1301b