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RISCBoy

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Design files

Luke WrenImprove PPU bus timing, this seems like a genuine optimisation but weirdly is making system-level timing worse, so put on a branch for nowd9d9ba093

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Source

#!/usr/bin/env python3

import sys

f = open(sys.argv[1])
regs = []
found_regs = False
for l in f:
	if found_regs:
		try:
			regs.append(int(l, 16))
		except:
			break
	else:
		found_regs = "Register contents:" in l
assert(len(regs) == 32)

# Actual test:

assert(regs[9] == 6)
print("Test PASSED.")

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