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Drill report for /home/knight/Documents/FOSSASIA/PSLab/pslab-hardware/schematics/PSLab.kicad_pcb
Created on Sun 30 Dec 2018 12:22:01 +0530
Copper Layer Stackup:
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L1 : L1.Front front
L2 : L2.Signal inner1
L3 : L3.Power inner2
L4 : L4.Ground back
Drill file 'PSLab.drl' contains
plated through holes:
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T1 0.41mm 0.016" (126 holes)
T2 0.65mm 0.026" (2 holes) (with 2 slots)
T3 0.82mm 0.032" (2 holes) (with 2 slots)
T4 1.00mm 0.039" (79 holes)
T5 3.20mm 0.126" (4 holes)
Total plated holes count 213
Not plated through holes are merged with plated holes
unplated through holes:
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Total unplated holes count 0
84dc2b08fThis file is pinned to the selected release. Download the original to open it in your design tool.