pcb

v 20130925 2
C 35400 37200 1 0 1 jumper2.sym
{
T 34400 37000 5 8 0 1 0 6 1
device=CONNECTOR
T 35000 38100 5 10 1 1 0 6 1
refdes=J3
T 34400 36800 5 8 0 1 0 6 1
footprint=PWL2
T 35400 37200 5 10 1 1 0 0 1
value=PWL2
}
C 30300 53800 1 90 0 agnd.sym
C 33600 47300 1 0 0 agnd.sym
N 33100 47800 33100 47500 4
N 33100 47500 34300 47500 4
N 34300 47500 34300 47800 4
N 33500 47800 33500 47500 4
N 38600 47800 38600 47500 4
N 38600 47500 41400 47500 4
N 41400 47500 41400 47800 4
N 39000 47800 39000 47500 4
N 39400 47800 39400 47500 4
N 39800 47800 39800 47500 4
N 40200 47800 40200 47500 4
N 40600 47800 40600 47500 4
N 41000 47800 41000 47500 4
C 39900 47300 1 0 0 agnd.sym
C 45200 52500 1 0 0 agnd.sym
N 45100 53000 45100 52700 4
N 45100 52700 45500 52700 4
N 45500 52700 45500 53000 4
N 57200 47400 57200 47100 4
N 57200 47100 60800 47100 4
N 60800 47100 60800 47400 4
N 57600 47400 57600 47100 4
N 58000 47400 58000 47100 4
N 58400 47400 58400 47100 4
N 58800 47400 58800 47100 4
N 59200 47400 59200 47100 4
N 59600 47400 59600 47100 4
N 60000 47400 60000 47100 4
N 60400 47400 60400 47100 4
C 58900 46900 1 0 0 agnd.sym
N 68200 48600 68200 48300 4
N 68200 48300 71800 48300 4
N 71800 48300 71800 48600 4
N 68600 48600 68600 48300 4
N 69000 48600 69000 48300 4
N 69400 48600 69400 48300 4
N 69800 48600 69800 48300 4
N 70200 48600 70200 48300 4
N 71000 48600 71000 48300 4
N 35400 37400 35700 37400 4
N 35400 37800 35700 37800 4
C 37900 37400 1 0 0 testpt-1.sym
{
T 38300 38300 5 10 0 1 0 0 1
device=TESTPOINT
T 38300 38100 5 10 0 1 0 0 1
footprint=JUMPER1
T 38100 37500 5 10 1 1 0 0 1
refdes=TP2
T 37900 37400 5 10 0 1 0 0 1
value=PLS
}
N 37700 37400 38000 37400 4
C 37900 36200 1 0 0 agnd.sym
N 36500 36700 36500 36400 4
N 36500 36400 38000 36400 4
N 38000 36400 38000 37400 4
N 36900 36700 36900 36400 4
N 61300 54500 67700 54500 4
N 61300 54100 67700 54100 4
N 61300 53300 67700 53300 4
N 61300 52900 67700 52900 4
N 36000 53700 36000 54100 4
N 36000 54100 35600 54100 4
C 57200 36600 1 90 0 agnd.sym
N 57000 36700 56700 36700 4
N 68600 32400 68600 32100 4
N 68600 32100 70200 32100 4
N 70200 32100 70200 32400 4
N 69000 32400 69000 32100 4
N 69400 32400 69400 32100 4
C 69300 31900 1 0 0 agnd.sym
C 68700 41400 1 0 1 vcc.sym
{
T 68700 43100 5 8 0 0 0 6 1
footprint=none
T 68700 42900 5 8 0 0 0 6 1
symversion=1.0
T 68700 41400 5 10 0 1 0 6 1
net=5V_2:1
T 68500 41500 5 10 1 1 0 6 1
value=5V_2
}
C 69500 41400 1 0 1 vcc.sym
{
T 69500 43100 5 8 0 0 0 6 1
footprint=none
T 69500 42900 5 8 0 0 0 6 1
symversion=1.0
T 69500 41400 5 10 0 1 0 6 1
net=3V3:1
T 69800 41500 5 10 1 1 0 6 1
value=3V3
}
C 70300 41400 1 0 1 vcc.sym
{
T 70300 43100 5 8 0 0 0 6 1
footprint=none
T 70300 42900 5 8 0 0 0 6 1
symversion=1.0
T 70300 41400 5 10 0 1 0 6 1
net=3V3:1
T 70600 41500 5 10 1 1 0 6 1
value=3V3
}
C 40100 55300 1 0 1 vcc.sym
{
T 40100 57000 5 8 0 0 0 6 1
footprint=none
T 40100 56800 5 8 0 0 0 6 1
symversion=1.0
T 40100 55300 5 10 0 1 0 6 1
net=5V:1
T 39900 55500 5 10 1 1 0 6 1
value=5V
}
N 33300 54800 33300 56200 4
N 34100 54800 34100 58600 4
C 39500 55800 1 0 0 capacitor-1.sym
{
T 39700 56500 5 10 0 1 0 0 1
device=CAPACITOR
T 39800 56200 5 10 1 1 0 6 1
refdes=C10
T 40100 56200 5 10 1 1 0 0 1
value=100p
T 39500 55800 5 10 0 1 0 0 1
footprint=0402
}
N 38100 54100 37700 54100 4
N 37700 54100 37700 56000 4
N 37700 56000 39500 56000 4
N 41900 54100 42300 54100 4
N 42300 54100 42300 56000 4
N 42300 56000 40400 56000 4
N 37800 52900 38100 52900 4
C 37000 52200 1 180 1 input-1.sym
{
T 37000 51900 5 10 0 0 180 6 1
device=INPUT
T 37000 52200 5 10 0 0 180 6 1
net=SPI_MOSI:1
T 36900 52000 5 10 1 1 0 6 1
value=SPI_MOSI
}
N 37800 52100 38100 52100 4
C 55500 51000 1 180 1 input-1.sym
{
T 55500 50700 5 10 0 0 180 6 1
device=INPUT
T 55500 51000 5 10 0 0 180 6 1
net=SPI_CLK:1
T 55400 50800 5 10 1 1 0 6 1
value=SPI_CLK
}
C 66500 50200 1 180 1 input-1.sym
{
T 66500 49900 5 10 0 0 180 6 1
device=INPUT
T 66500 50200 5 10 0 0 180 6 1
net=SPI_CLK:1
T 66400 50000 5 10 1 1 0 6 1
value=SPI_CLK
}
N 67300 50100 67700 50100 4
C 66500 49800 1 180 1 input-1.sym
{
T 66500 49500 5 10 0 0 180 6 1
device=INPUT
T 66500 49800 5 10 0 0 180 6 1
net=SPI_MOSI:1
T 66400 49600 5 10 1 1 0 6 1
value=SPI_MOSI
}
N 67300 49700 67700 49700 4
C 67300 49200 1 0 1 output-1.sym
{
T 67200 49500 5 10 0 0 0 6 1
device=OUTPUT
T 67300 49200 5 10 0 0 0 6 1
net=SPI_MISO:1
T 66400 49200 5 10 1 1 0 6 1
value=SPI_MISO
}
N 67300 49300 67700 49300 4
N 58400 56200 58400 55200 4
N 57600 55200 57600 55500 4
N 59200 56500 59200 55200 4
N 58800 55200 58800 56500 4
N 58000 55200 58000 55900 4
N 60000 55200 60000 55900 4
N 60400 55500 60400 55200 4
N 68800 55200 68800 55500 4
N 68800 55500 70400 55500 4
N 70400 55500 70400 55200 4
N 70000 55200 70000 55500 4
N 69600 55200 69600 55500 4
N 69200 55200 69200 55500 4
C 71300 56400 1 0 1 vcc.sym
{
T 71300 58100 5 8 0 0 0 6 1
footprint=none
T 71300 57900 5 8 0 0 0 6 1
symversion=1.0
T 71300 56400 5 10 0 1 0 6 1
net=3V3_3:1
T 71100 56500 5 10 1 1 0 6 1
value=3V3_3
}
N 71200 56400 71200 55200 4
N 61300 52100 67700 52100 4
C 55200 52100 1 0 1 vcc.sym
{
T 55200 53800 5 8 0 0 0 6 1
footprint=none
T 55200 53600 5 8 0 0 0 6 1
symversion=1.0
T 55200 52100 5 10 0 1 0 6 1
net=3V3:1
T 55000 52200 5 10 1 1 0 6 1
value=3V3
}
N 55100 52100 56700 52100 4
C 66300 51300 1 0 1 vcc.sym
{
T 66300 53000 5 8 0 0 0 6 1
footprint=none
T 66300 52800 5 8 0 0 0 6 1
symversion=1.0
T 66300 51300 5 10 0 1 0 6 1
net=3V3_3:1
T 66100 51400 5 10 1 1 0 6 1
value=3V3_3
}
N 66200 51300 67700 51300 4
N 56300 50900 56700 50900 4
N 36100 51700 38100 51700 4
N 56300 51300 56700 51300 4
C 42600 35300 1 0 0 agnd.sym
N 42300 35600 42300 35500 4
N 42300 35500 43100 35500 4
N 43100 35600 43100 35500 4
N 42700 35600 42700 35500 4
C 42600 31600 1 0 0 agnd.sym
N 42300 31900 42300 31800 4
N 42300 31800 43100 31800 4
N 43100 31900 43100 31800 4
N 42700 31900 42700 31800 4
C 50900 32000 1 0 0 agnd.sym
N 50600 32300 50600 32200 4
N 50600 32200 51400 32200 4
N 51400 32300 51400 32200 4
N 51000 32300 51000 32200 4
C 40700 36200 1 90 0 capacitor-1.sym
{
T 40000 36400 5 10 0 1 90 0 1
device=CAPACITOR
T 40700 36200 5 10 0 1 0 0 1
footprint=0402
T 40400 36800 5 10 1 1 0 6 1
refdes=C50
T 40400 36500 5 10 1 1 180 0 1
value=1u
}
C 40400 36000 1 0 0 agnd.sym
N 41700 37100 39500 37100 4
N 39500 33800 39500 41000 4
C 40700 32900 1 90 0 capacitor-1.sym
{
T 40000 33100 5 10 0 1 90 0 1
device=CAPACITOR
T 40700 32900 5 10 0 1 0 0 1
footprint=0603
T 40400 33500 5 10 1 1 0 6 1
refdes=C60
T 40400 33200 5 10 1 1 180 0 1
value=4.7u
}
C 40400 32700 1 0 0 agnd.sym
N 41700 33800 39500 33800 4
N 41700 36700 41400 36700 4
N 43700 33800 50000 33800 4
C 48200 32900 1 90 0 capacitor-1.sym
{
T 47500 33100 5 10 0 1 90 0 1
device=CAPACITOR
T 48200 32900 5 10 0 1 0 0 1
footprint=0603
T 47900 33500 5 10 1 1 0 6 1
refdes=C92
T 47900 33200 5 10 1 1 180 0 1
value=4.7u
}
C 47900 32700 1 0 0 agnd.sym
N 50000 33400 49700 33400 4
N 49700 33400 49700 33800 4
C 46200 36200 1 90 0 capacitor-1.sym
{
T 45500 36400 5 10 0 1 90 0 1
device=CAPACITOR
T 46200 36200 5 10 0 1 0 0 1
footprint=0402
T 45900 36800 5 10 1 1 0 6 1
refdes=C65
T 45900 36500 5 10 1 1 180 0 1
value=1u
}
C 45900 36000 1 0 0 agnd.sym
C 55200 32900 1 90 0 capacitor-1.sym
{
T 54500 33100 5 10 0 1 90 0 1
device=CAPACITOR
T 55200 32900 5 10 0 1 0 0 1
footprint=0402
T 54900 33500 5 10 1 1 0 6 1
refdes=C109
T 54900 33200 5 10 1 1 180 0 1
value=1u
}
C 54900 32700 1 0 0 agnd.sym
C 45900 37100 1 0 0 vcc.sym
{
T 45900 38800 5 8 0 0 0 0 1
footprint=none
T 45900 38600 5 8 0 0 0 0 1
symversion=1.0
T 45900 37100 5 10 0 1 0 0 1
net=3V3:1
T 46100 37200 5 10 1 1 0 0 1
value=3V3
}
C 54900 33800 1 0 0 vcc.sym
{
T 54900 35500 5 8 0 0 0 0 1
footprint=none
T 54900 35300 5 8 0 0 0 0 1
symversion=1.0
T 54900 33800 5 10 0 1 0 0 1
net=14V:1
T 55100 33900 5 10 1 1 0 0 1
value=14V
}
N 55000 33800 52000 33800 4
N 46000 37100 43700 37100 4
C 47900 33800 1 0 0 vcc.sym
{
T 47900 35500 5 8 0 0 0 0 1
footprint=none
T 47900 35300 5 8 0 0 0 0 1
symversion=1.0
T 47900 33800 5 10 0 1 0 0 1
net=15V:1
T 48100 33900 5 10 1 1 0 0 1
value=15V
}
C 44900 37100 1 0 0 testpt-1.sym
{
T 45300 38000 5 10 0 1 0 0 1
device=TESTPOINT
T 45300 37800 5 10 0 1 0 0 1
footprint=JUMPER1
T 45100 37200 5 10 1 1 0 0 1
refdes=TP4
T 44900 37100 5 10 0 1 0 0 1
value=PLS
}
C 44400 33800 1 0 0 testpt-1.sym
{
T 44800 34700 5 10 0 1 0 0 1
device=TESTPOINT
T 44800 34500 5 10 0 1 0 0 1
footprint=JUMPER1
T 44600 33900 5 10 1 1 0 0 1
refdes=TP6
T 44400 33800 5 10 0 1 0 0 1
value=PLS
}
C 53200 33800 1 0 0 testpt-1.sym
{
T 53600 34700 5 10 0 1 0 0 1
device=TESTPOINT
T 53600 34500 5 10 0 1 0 0 1
footprint=JUMPER1
T 53400 33900 5 10 1 1 0 0 1
refdes=TP10
T 53200 33800 5 10 0 1 0 0 1
value=PLS
}
C 45100 36200 1 90 0 resistor-2.sym
{
T 44750 36600 5 10 0 1 90 0 1
device=RESISTOR
T 44800 36700 5 10 1 1 0 6 1
refdes=R22
T 44800 36500 5 10 1 1 180 0 1
value=14k
T 45100 36200 5 10 0 1 0 0 1
footprint=0603
}
C 45100 35300 1 90 0 resistor-2.sym
{
T 44750 35700 5 10 0 1 90 0 1
device=RESISTOR
T 44800 35800 5 10 1 1 0 6 1
refdes=R23
T 44800 35600 5 10 1 1 180 0 1
value=8.2k
T 45100 35300 5 10 0 1 0 0 1
footprint=0603
}
C 44900 35100 1 0 0 agnd.sym
N 43700 36700 44300 36700 4
N 44300 36700 44300 36200 4
N 44300 36200 45000 36200 4
N 41700 33400 41300 33400 4
N 41300 33000 41300 33800 4
N 41700 33000 41300 33000 4
C 44000 32900 1 0 0 inductor-1.sym
{
T 44200 33400 5 10 0 1 0 0 1
device=INDUCTOR
T 44100 32800 5 10 1 1 0 0 1
refdes=L12
T 44400 32800 5 10 0 1 0 0 1
value=CDRH4D28NP-100NC
T 44000 32900 5 10 0 1 0 0 1
footprint=CDRH4D
T 44500 32800 5 10 1 1 0 0 1
comment=10u
}
N 43700 33000 44000 33000 4
N 44900 33000 45000 33000 4
N 45000 33000 45000 32600 4
N 45000 32600 43700 32600 4
C 44900 33500 1 180 0 resistor-2.sym
{
T 44500 33150 5 10 0 1 180 0 1
device=RESISTOR
T 44400 33700 5 10 1 1 180 0 1
refdes=R25
T 44500 33700 5 10 1 1 0 2 1
value=100
T 44900 33500 5 10 0 1 0 0 1
footprint=0603
}
N 43700 33400 44000 33400 4
C 46300 33800 1 270 0 resistor-2.sym
{
T 46650 33400 5 10 0 1 270 0 1
device=RESISTOR
T 46200 33400 5 10 1 1 0 6 1
refdes=R30
T 46200 33300 5 10 1 1 0 8 1
value=560k
T 46300 33800 5 10 0 1 0 0 1
footprint=0603
}
C 46300 32900 1 270 0 resistor-2.sym
{
T 46650 32500 5 10 0 1 270 0 1
device=RESISTOR
T 46200 32500 5 10 1 1 0 6 1
refdes=R31
T 46200 32400 5 10 1 1 0 8 1
value=49.9k
T 46300 32900 5 10 0 1 0 0 1
footprint=0603
}
C 46300 31800 1 0 0 agnd.sym
N 45500 32900 47000 32900 4
N 45500 32900 45500 33400 4
N 45500 33400 44900 33400 4
C 46800 32900 1 270 1 capacitor-1.sym
{
T 47500 33100 5 10 0 1 90 2 1
device=CAPACITOR
T 46800 32900 5 10 0 1 0 6 1
footprint=0603
T 47100 33500 5 10 1 1 0 0 1
refdes=C90
T 47100 33200 5 10 1 1 180 6 1
value=39p
}
C 41500 31600 1 90 0 capacitor-1.sym
{
T 40800 31800 5 10 0 1 90 0 1
device=CAPACITOR
T 41500 31600 5 10 0 1 0 0 1
footprint=0603
T 41200 32200 5 10 1 1 0 6 1
refdes=C64
T 41200 31900 5 10 1 1 180 0 1
value=47n
}
C 41200 31400 1 0 0 agnd.sym
N 41700 32600 41300 32600 4
N 41300 32600 41300 32500 4
C 61500 35900 1 180 0 agnd.sym
N 61600 35400 61600 35700 4
N 61600 35700 61200 35700 4
N 61200 35400 61200 35700 4
N 61600 39200 61600 39500 4
N 61600 39500 61200 39500 4
N 61200 39500 61200 39200 4
C 61500 39700 1 180 0 agnd.sym
N 62400 38500 63000 38500 4
N 62400 38100 63000 38100 4
N 62400 37700 63000 37700 4
N 62400 34300 62700 34300 4
C 56700 33300 1 0 1 jumper10.sym
{
T 55700 34300 5 8 0 1 0 6 1
device=CONNECTOR
T 56300 37400 5 10 1 1 0 6 1
refdes=J7
T 55700 34100 5 8 0 1 0 6 1
footprint=HEADER10_2
T 56700 33300 5 10 0 1 0 0 1
value=BH-10
}
T 56800 34700 9 10 1 0 0 0 1
SPI_MISO
T 56800 34300 9 10 1 0 0 0 1
SPI_MOSI
T 56800 33900 9 10 1 0 0 0 1
SPI_CLK
N 56700 33900 60400 33900 4
N 56700 34300 60400 34300 4
N 56700 34700 60400 34700 4
N 56700 36300 57500 36300 4
N 56700 35900 57900 35900 4
N 56700 35500 58300 35500 4
N 56700 35100 58700 35100 4
N 62700 33500 62400 33500 4
N 62700 33900 62400 33900 4
C 66500 34800 1 180 1 input-1.sym
{
T 66500 34500 5 10 0 0 180 6 1
device=INPUT
T 66500 34800 5 10 0 0 180 6 1
net=SPI_CLK:1
T 66400 34600 5 10 1 1 0 6 1
value=SPI_CLK
}
C 66500 34400 1 180 1 input-1.sym
{
T 66500 34100 5 10 0 0 180 6 1
device=INPUT
T 66500 34400 5 10 0 0 180 6 1
net=SPI_MOSI:1
T 66400 34200 5 10 1 1 0 6 1
value=SPI_MOSI
}
C 67300 33800 1 0 1 output-1.sym
{
T 67200 34100 5 10 0 0 0 6 1
device=OUTPUT
T 67300 33800 5 10 0 0 0 6 1
net=SPI_MISO:1
T 66400 33800 5 10 1 1 0 6 1
value=SPI_MISO
}
C 53900 32900 1 90 0 resistor-2.sym
{
T 53550 33300 5 10 0 1 90 0 1
device=RESISTOR
T 53900 32900 5 10 0 1 0 0 1
footprint=0603
T 53600 33400 5 10 1 1 0 6 1
refdes=R41
T 53600 33200 5 10 1 1 180 0 1
value=51k
}
C 53900 32000 1 90 0 resistor-2.sym
{
T 53550 32400 5 10 0 1 90 0 1
device=RESISTOR
T 53900 32000 5 10 0 1 0 0 1
footprint=0603
T 53600 32500 5 10 1 1 0 6 1
refdes=R44
T 53600 32300 5 10 1 1 180 0 1
value=4.87k
}
C 53700 31800 1 0 0 agnd.sym
N 53100 33400 53100 32900 4
N 53100 32900 53800 32900 4
N 53100 33400 52000 33400 4
C 50500 55300 1 180 0 agnd.sym
N 51000 54800 51000 55100 4
N 51000 55100 49800 55100 4
N 49800 54800 49800 55100 4
N 50600 54800 50600 55100 4
N 50200 54800 50200 55100 4
C 48800 53400 1 270 0 agnd.sym
N 49000 53300 49100 53300 4
C 48800 54200 1 270 0 agnd.sym
N 49000 54100 49100 54100 4
C 50300 52100 1 0 0 agnd.sym
N 50800 52600 50800 52300 4
N 50800 52300 50000 52300 4
N 50000 52300 50000 52600 4
N 50400 52600 50400 52300 4
C 52000 53600 1 90 0 agnd.sym
N 51800 53700 51700 53700 4
N 52000 53300 51700 53300 4
C 58900 42300 1 0 0 agnd.sym
N 58200 42500 59800 42500 4
N 58200 42800 58200 42500 4
N 58600 42800 58600 42500 4
N 59000 42800 59000 42500 4
N 59400 42800 59400 42500 4
N 59800 42800 59800 42500 4
C 35000 44000 1 90 0 resistor-2.sym
{
T 34650 44400 5 10 0 1 90 0 1
device=RESISTOR
T 34700 44400 5 10 1 1 0 6 1
refdes=R10
T 35000 44000 5 10 0 1 0 0 1
footprint=0603
}
C 35000 42200 1 90 0 resistor-2.sym
{
T 34650 42600 5 10 0 1 90 0 1
device=RESISTOR
T 34700 42600 5 10 1 1 0 6 1
refdes=R11
T 35000 42200 5 10 0 1 0 0 1
footprint=0603
}
C 38000 42200 1 0 0 agnd.sym
C 34800 42000 1 0 0 agnd.sym
N 35400 43500 37100 43500 4
C 38200 44900 1 0 1 vcc.sym
{
T 38200 46600 5 8 0 0 0 6 1
footprint=none
T 38200 46400 5 8 0 0 0 6 1
symversion=1.0
T 38200 44900 5 10 0 1 0 6 1
net=3V3_2:1
T 38000 45000 5 10 1 1 0 6 1
value=3V3_2
}
C 38000 44700 1 180 0 capacitor-1.sym
{
T 37800 44000 5 10 0 1 180 0 1
device=CAPACITOR
T 38000 44700 5 10 0 1 90 0 1
footprint=0402
T 37400 44600 5 10 1 1 0 6 1
refdes=C23
T 37700 44600 5 10 1 1 0 0 1
value=1u
}
N 38100 44900 38100 44200 4
C 36800 44600 1 270 0 agnd.sym
N 37000 44500 37100 44500 4
C 39100 44700 1 180 0 capacitor-1.sym
{
T 38900 44000 5 10 0 1 180 0 1
device=CAPACITOR
T 39100 44700 5 10 0 1 90 0 1
footprint=0402
T 38500 44600 5 10 1 1 0 6 1
refdes=C30
T 38800 44600 5 10 1 1 0 0 1
value=100p
}
C 39400 44400 1 90 0 agnd.sym
N 39200 44500 39100 44500 4
C 40300 43700 1 180 0 capacitor-1.sym
{
T 40100 43000 5 10 0 1 180 0 1
device=CAPACITOR
T 40300 43700 5 10 0 1 90 0 1
footprint=0402
T 39700 43600 5 10 1 1 0 6 1
refdes=C35
T 40000 43600 5 10 1 1 0 0 1
value=10n
}
N 39400 43500 39100 43500 4
C 41600 43600 1 90 0 resistor-2.sym
{
T 41250 44000 5 10 0 1 90 0 1
device=RESISTOR
T 41300 44100 5 10 1 1 0 6 1
refdes=R13
T 41600 43600 5 10 0 1 0 0 1
footprint=0603
}
C 41600 42500 1 90 0 resistor-2.sym
{
T 41250 42900 5 10 0 1 90 0 1
device=RESISTOR
T 41300 43000 5 10 1 1 0 6 1
refdes=R15
T 41600 42500 5 10 0 1 0 0 1
footprint=0603
}
C 41400 43600 1 180 0 resistor-2.sym
{
T 41000 43250 5 10 0 1 180 0 1
device=RESISTOR
T 41000 43700 5 10 1 1 0 6 1
refdes=R14
T 41400 43600 5 10 0 1 0 0 1
footprint=0603
}
N 40500 43500 40300 43500 4
C 42500 43600 1 180 0 resistor-2.sym
{
T 42100 43250 5 10 0 1 180 0 1
device=RESISTOR
T 42100 43700 5 10 1 1 0 6 1
refdes=R16
T 42500 43600 5 10 0 1 0 0 1
footprint=0603
}
N 41500 43600 41500 43400 4
N 41600 43500 41500 43500 4
N 41500 43500 41400 43500 4
C 44300 43700 1 180 0 capacitor-1.sym
{
T 44100 43000 5 10 0 1 180 0 1
device=CAPACITOR
T 44300 43700 5 10 0 1 90 0 1
footprint=0402
T 43700 43600 5 10 1 1 0 6 1
refdes=C41
T 44000 43600 5 10 1 1 0 0 1
value=10n
}
N 43400 43500 42500 43500 4
N 44500 43500 44300 43500 4
C 41400 42300 1 0 0 agnd.sym
C 45700 41200 1 0 0 agnd.sym
C 40600 45000 1 0 0 agnd.sym
N 41500 45400 41000 45400 4
C 45500 45000 1 0 1 vcc.sym
{
T 45500 46700 5 8 0 0 0 6 1
footprint=none
T 45500 46500 5 8 0 0 0 6 1
symversion=1.0
T 45500 45000 5 10 0 1 0 6 1
net=3V3_2:1
T 45300 45100 5 10 1 1 0 6 1
value=3V3_2
}
C 55500 52800 1 180 1 input-1.sym
{
T 55500 52500 5 10 0 0 180 6 1
device=INPUT
T 55500 52800 5 10 0 0 180 6 1
net=REFIN:1
T 55400 52600 5 10 1 1 0 6 1
value=REFIN
}
N 56500 52900 56700 52900 4
C 45200 44800 1 180 0 capacitor-1.sym
{
T 45000 44100 5 10 0 1 180 0 1
device=CAPACITOR
T 45200 44800 5 10 0 1 90 0 1
footprint=0402
T 44600 44700 5 10 1 1 0 6 1
refdes=C39
T 44900 44700 5 10 1 1 0 0 1
value=100p
}
C 47300 44800 1 180 0 capacitor-1.sym
{
T 47100 44100 5 10 0 1 180 0 1
device=CAPACITOR
T 47300 44800 5 10 0 1 90 0 1
footprint=0402
T 46700 44700 5 10 1 1 0 6 1
refdes=C47
T 47000 44700 5 10 1 1 0 0 1
value=100p
}
N 45400 45000 45400 44200 4
C 44000 44700 1 270 0 agnd.sym
C 47600 44500 1 90 0 agnd.sym
N 45200 44600 45400 44600 4
N 47400 44600 47300 44600 4
N 38100 44900 34900 44900 4
N 38000 44500 38100 44500 4
N 38100 44500 38200 44500 4
N 59000 45400 59000 46300 4
C 56000 46300 1 270 0 capacitor-1.sym
{
T 56700 46100 5 10 0 1 270 0 1
device=CAPACITOR
T 56000 46300 5 10 0 1 180 0 1
footprint=0402
T 56300 46000 5 10 1 1 0 0 1
refdes=C69
T 56300 45700 5 10 1 1 180 6 1
value=100n
}
C 56400 45000 1 0 0 agnd.sym
N 71400 37500 71200 37500 4
N 71400 37100 71200 37100 4
N 71400 35500 71200 35500 4
N 71400 35100 71200 35100 4
N 71400 34700 71200 34700 4
C 66500 50600 1 180 1 input-1.sym
{
T 66500 50300 5 10 0 0 180 6 1
device=INPUT
T 66500 50600 5 10 0 0 180 6 1
net=SPI_CS3:1
T 66400 50400 5 10 1 1 0 6 1
value=SPI_CS3
}
N 67300 50500 67700 50500 4
C 54700 53300 1 0 0 agnd.sym
C 41300 44500 1 270 1 capacitor-1.sym
{
T 42000 44700 5 10 0 1 90 2 1
device=CAPACITOR
T 41300 44500 5 10 0 1 0 6 1
footprint=0402
T 41600 45100 5 10 1 1 0 0 1
refdes=C36
T 41600 44800 5 10 1 1 180 6 1
value=1u
}
C 44100 49200 1 270 1 capacitor-1.sym
{
T 44800 49400 5 10 0 1 90 2 1
device=CAPACITOR
T 44100 49200 5 10 0 1 0 6 1
footprint=0402
T 44400 49800 5 10 1 1 0 0 1
refdes=C31
T 44400 49500 5 10 1 1 180 6 1
value=1n
}
C 44200 49000 1 0 0 agnd.sym
N 44300 50100 41900 50100 4
N 41900 50500 44300 50500 4
N 44300 50100 44300 50900 4
N 41900 50900 44300 50900 4
C 43400 48800 1 270 1 capacitor-1.sym
{
T 44100 49000 5 10 0 1 90 2 1
device=CAPACITOR
T 43400 48800 5 10 0 1 0 6 1
footprint=0402
T 43700 49400 5 10 1 1 0 0 1
refdes=C29
T 43700 49100 5 10 1 1 180 6 1
value=1n
}
C 43500 48600 1 0 0 agnd.sym
N 41900 49700 43600 49700 4
C 42700 48400 1 270 1 capacitor-1.sym
{
T 43400 48600 5 10 0 1 90 2 1
device=CAPACITOR
T 42700 48400 5 10 0 1 0 6 1
footprint=0402
T 43000 49000 5 10 1 1 0 0 1
refdes=C27
T 43000 48700 5 10 1 1 180 6 1
value=1n
}
N 42900 49300 41900 49300 4
C 42000 48000 1 270 1 capacitor-1.sym
{
T 42700 48200 5 10 0 1 90 2 1
device=CAPACITOR
T 42000 48000 5 10 0 1 0 6 1
footprint=0402
T 42300 48600 5 10 1 1 0 0 1
refdes=C24
T 42300 48300 5 10 1 1 180 6 1
value=1n
}
N 41900 48900 42200 48900 4
C 42800 48200 1 0 0 agnd.sym
C 42100 47800 1 0 0 agnd.sym
C 37400 53900 1 180 0 capacitor-1.sym
{
T 37200 53200 5 10 0 1 180 0 1
device=CAPACITOR
T 37400 53900 5 10 0 1 90 0 1
footprint=0402
T 36800 53800 5 10 1 1 0 6 1
refdes=C8
T 37100 53800 5 10 1 1 0 0 1
value=100p
}
N 38100 53700 37400 53700 4
N 36500 53700 36000 53700 4
C 36700 51300 1 0 1 vcc.sym
{
T 36700 53000 5 8 0 0 0 6 1
footprint=none
T 36700 52800 5 8 0 0 0 6 1
symversion=1.0
T 36700 51300 5 10 0 1 0 6 1
net=5V:1
T 36500 51300 5 10 1 1 0 6 1
value=5V
}
C 37700 48700 1 0 0 agnd.sym
N 38100 50900 37800 50900 4
N 37800 50900 37800 48900 4
N 38100 48900 37800 48900 4
N 38100 49300 37800 49300 4
N 38100 49700 37800 49700 4
N 38100 50100 37800 50100 4
N 38100 50500 37800 50500 4
C 37000 52600 1 180 1 input-1.sym
{
T 37000 52300 5 10 0 0 180 6 1
device=INPUT
T 37000 52600 5 10 0 0 180 6 1
net=SPI_CLK:1
T 36900 52400 5 10 1 1 0 6 1
value=SPI_CLK
}
N 37800 52500 38100 52500 4
C 37800 53400 1 180 0 resistor-2.sym
{
T 37400 53050 5 10 0 1 180 0 1
device=RESISTOR
T 37300 53200 5 10 1 1 180 0 1
refdes=R7
T 37400 53200 5 10 1 1 180 6 1
value=10k
T 37800 53400 5 10 0 1 0 0 1
footprint=0402
}
N 37900 52900 37900 53300 4
N 37900 53300 37800 53300 4
C 36700 53300 1 0 1 vcc.sym
{
T 36700 55000 5 8 0 0 0 6 1
footprint=none
T 36700 54800 5 8 0 0 0 6 1
symversion=1.0
T 36700 53300 5 10 0 1 0 6 1
net=5V:1
T 36500 53300 5 10 1 1 0 6 1
value=5V
}
N 36600 53300 36900 53300 4
C 42400 52800 1 90 0 agnd.sym
C 42400 52400 1 90 0 agnd.sym
N 42200 52900 41900 52900 4
N 42200 52500 41900 52500 4
C 56300 54600 1 180 0 resistor-2.sym
{
T 55900 54250 5 10 0 1 180 0 1
device=RESISTOR
T 55800 54400 5 10 1 1 180 0 1
refdes=R17
T 55900 54400 5 10 1 1 180 6 1
value=10k
T 56300 54600 5 10 0 1 0 0 1
footprint=0402
}
N 56700 54500 56300 54500 4
C 55200 54600 1 270 0 agnd.sym
C 55500 55100 1 180 1 input-1.sym
{
T 55500 54800 5 10 0 0 180 6 1
device=INPUT
T 55500 55100 5 10 0 0 180 6 1
net=RFSW:1
T 55400 54900 5 10 1 1 0 6 1
value=RFSW
}
N 56500 54500 56500 55000 4
N 56500 55000 56300 55000 4
C 73500 51000 1 180 0 input-1.sym
{
T 73500 50700 5 10 0 0 180 0 1
device=INPUT
T 73500 51000 5 10 0 0 180 0 1
net=GAIN:1
T 73600 51000 5 10 1 1 180 6 1
value=GAIN
}
N 72700 50900 72300 50900 4
N 71400 36300 71200 36300 4
C 73500 50200 1 180 0 input-1.sym
{
T 73500 49900 5 10 0 0 180 0 1
device=INPUT
T 73500 50200 5 10 0 0 180 0 1
net=OFDS:1
T 73600 50000 5 10 1 1 0 0 1
value=OFDS
}
N 72700 50100 72300 50100 4
C 73600 50600 1 180 0 resistor-2.sym
{
T 73200 50250 5 10 0 1 180 0 1
device=RESISTOR
T 73100 50400 5 10 1 1 180 0 1
refdes=R47
T 73200 50400 5 10 1 1 180 6 1
value=10k
T 73600 50600 5 10 0 1 0 0 1
footprint=0402
}
N 72700 50500 72500 50500 4
N 72500 50500 72500 50100 4
C 73700 50500 1 0 0 vcc.sym
{
T 73700 52200 5 8 0 0 0 0 1
footprint=none
T 73700 52000 5 8 0 0 0 0 1
symversion=1.0
T 73700 50500 5 10 0 1 0 0 1
net=3V3_3:1
T 73600 50300 5 10 1 1 0 0 1
value=3V3_3
}
N 73800 50500 73600 50500 4
C 73600 49900 1 180 0 capacitor-1.sym
{
T 73400 49200 5 10 0 1 180 0 1
device=CAPACITOR
T 73600 49900 5 10 0 1 90 0 1
footprint=0402
T 73000 49500 5 10 1 1 0 6 1
refdes=C112
T 73300 49500 5 10 1 1 0 0 1
value=1n
}
N 72700 49700 72300 49700 4
C 73600 49500 1 180 0 capacitor-1.sym
{
T 73400 48800 5 10 0 1 180 0 1
device=CAPACITOR
T 73600 49500 5 10 0 1 90 0 1
footprint=0402
T 73000 49100 5 10 1 1 0 6 1
refdes=C113
T 73300 49100 5 10 1 1 0 0 1
value=1n
}
C 74000 49600 1 90 0 agnd.sym
C 74000 49200 1 90 0 agnd.sym
N 72700 49300 72300 49300 4
N 73800 49700 73600 49700 4
N 73800 49300 73600 49300 4
C 55000 48400 1 90 0 capacitor-1.sym
{
T 54300 48600 5 10 0 1 90 0 1
device=CAPACITOR
T 55000 48400 5 10 0 1 0 0 1
footprint=0603
T 54900 49000 5 10 1 1 0 0 1
refdes=C56
T 54900 48700 5 10 1 1 180 6 1
value=2.7n
}
C 54300 48400 1 90 0 resistor-2.sym
{
T 53950 48800 5 10 0 1 90 0 1
device=RESISTOR
T 54000 48900 5 10 1 1 0 6 1
refdes=R21
T 54300 48400 5 10 0 1 0 0 1
footprint=0603
T 54000 48800 5 10 1 1 180 0 1
value=470/1%
}
C 54400 47500 1 90 0 capacitor-1.sym
{
T 53700 47700 5 10 0 1 90 0 1
device=CAPACITOR
T 54400 47500 5 10 0 1 0 0 1
footprint=0603
T 54300 48100 5 10 1 1 0 0 1
refdes=C57
T 54300 47800 5 10 1 1 180 6 1
value=47n
}
C 53500 47500 1 90 0 capacitor-1.sym
{
T 52800 47700 5 10 0 1 90 0 1
device=CAPACITOR
T 53500 47500 5 10 0 1 0 0 1
footprint=0603
T 53400 48100 5 10 1 1 0 0 1
refdes=C51
T 53400 47800 5 10 1 1 180 6 1
value=1.8n
}
C 52600 47500 1 90 0 capacitor-1.sym
{
T 51900 47700 5 10 0 1 90 0 1
device=CAPACITOR
T 52600 47500 5 10 0 1 0 0 1
footprint=0603
T 52500 48100 5 10 1 1 0 0 1
refdes=C49
T 52500 47800 5 10 1 1 180 6 1
value=560p
}
C 53300 49200 1 0 1 resistor-2.sym
{
T 52900 49550 5 10 0 1 0 6 1
device=RESISTOR
T 53000 49600 5 10 1 1 180 0 1
refdes=R18
T 53300 49200 5 10 0 1 0 0 1
footprint=0603
T 52600 49100 5 10 1 1 180 6 1
value=1.5k/1%
}
C 54200 49200 1 0 1 resistor-2.sym
{
T 53800 49550 5 10 0 1 0 6 1
device=RESISTOR
T 53900 49600 5 10 1 1 180 0 1
refdes=R20
T 54200 49200 5 10 0 1 0 0 1
footprint=0603
T 54000 49600 5 10 1 1 180 6 1
value=280/1%
}
N 56700 49300 54200 49300 4
N 52400 47500 54800 47500 4
N 54800 47500 54800 48400 4
C 53200 47300 1 0 0 agnd.sym
N 56700 49700 52400 49700 4
N 52400 48400 52400 49700 4
N 52000 43500 52000 53300 4
C 67300 35900 1 0 0 testpt-1.sym
{
T 67700 36800 5 10 0 1 0 0 1
device=TESTPOINT
T 67700 36600 5 10 0 1 0 0 1
footprint=JUMPER1
T 67200 36300 5 10 1 1 0 0 1
refdes=TP11
T 67300 35900 5 10 0 1 0 0 1
value=PLS
}
C 56300 50400 1 0 1 io-1.sym
{
T 55400 50600 5 10 0 0 0 6 1
net=SPI_SDIO:1
T 56100 51000 5 10 0 0 0 6 1
device=none
T 55400 50500 5 10 1 1 0 7 1
value=SPI_SDIO
}
N 56300 50500 56700 50500 4
C 55700 47600 1 90 0 capacitor-1.sym
{
T 55000 47800 5 10 0 1 90 0 1
device=CAPACITOR
T 55700 47600 5 10 0 1 0 0 1
footprint=0402
T 55600 48200 5 10 1 1 0 0 1
refdes=C61
T 55600 47900 5 10 1 1 180 6 1
value=100p
}
C 56400 47200 1 90 0 capacitor-1.sym
{
T 55700 47400 5 10 0 1 90 0 1
device=CAPACITOR
T 56400 47200 5 10 0 1 0 0 1
footprint=0402
T 56300 47800 5 10 1 1 0 0 1
refdes=C62
T 56300 47500 5 10 1 1 180 6 1
value=100p
}
C 56100 47000 1 0 0 agnd.sym
C 55400 47400 1 0 0 agnd.sym
N 56200 48100 56900 48100 4
N 55500 48500 56900 48500 4
C 63100 48100 1 180 0 capacitor-1.sym
{
T 62900 47400 5 10 0 1 180 0 1
device=CAPACITOR
T 63100 48100 5 10 0 1 90 0 1
footprint=0402
T 62500 48000 5 10 1 1 0 6 1
refdes=C94
T 62800 48000 5 10 1 1 0 0 1
value=100p
}
N 63400 47900 63100 47900 4
C 63100 47500 1 180 0 capacitor-1.sym
{
T 62900 46800 5 10 0 1 180 0 1
device=CAPACITOR
T 63100 47500 5 10 0 1 90 0 1
footprint=0402
T 62500 47400 5 10 1 1 0 6 1
refdes=C95
T 62800 47400 5 10 1 1 0 0 1
value=100p
}
N 61400 47300 62200 47300 4
N 63100 47300 63400 47300 4
N 64900 46700 64900 47300 4
C 63100 51100 1 180 0 capacitor-1.sym
{
T 62900 50400 5 10 0 1 180 0 1
device=CAPACITOR
T 63100 51100 5 10 0 1 90 0 1
footprint=0603
T 62500 51000 5 10 1 1 0 6 1
refdes=C77
T 62800 51000 5 10 1 1 0 0 1
value=220n
}
C 63400 50800 1 90 0 agnd.sym
N 63200 50900 63100 50900 4
C 63100 50700 1 180 0 capacitor-1.sym
{
T 62900 50000 5 10 0 1 180 0 1
device=CAPACITOR
T 63100 50700 5 10 0 1 90 0 1
footprint=0402
T 62500 50600 5 10 1 1 0 6 1
refdes=C79
T 62800 50600 5 10 1 1 0 0 1
value=100p
}
C 63400 50400 1 90 0 agnd.sym
N 63200 50500 63100 50500 4
N 61300 50500 61400 50500 4
N 61400 50500 61400 50900 4
N 61400 50900 62200 50900 4
C 63100 50300 1 180 0 capacitor-1.sym
{
T 62900 49600 5 10 0 1 180 0 1
device=CAPACITOR
T 63100 50300 5 10 0 1 90 0 1
footprint=0603
T 62500 50200 5 10 1 1 0 6 1
refdes=C82
T 62800 50200 5 10 1 1 0 0 1
value=10u
}
C 63400 50000 1 90 0 agnd.sym
N 63200 50100 63100 50100 4
N 61300 50100 62200 50100 4
N 62000 50100 62000 50500 4
N 62000 50500 62200 50500 4
C 63100 49500 1 180 0 capacitor-1.sym
{
T 62900 48800 5 10 0 1 180 0 1
device=CAPACITOR
T 63100 49500 5 10 0 1 90 0 1
footprint=0603
T 62500 49400 5 10 1 1 0 6 1
refdes=C86
T 62800 49400 5 10 1 1 0 0 1
value=10u
}
C 63100 49900 1 180 0 capacitor-1.sym
{
T 62900 49200 5 10 0 1 180 0 1
device=CAPACITOR
T 63100 49900 5 10 0 1 90 0 1
footprint=0402
T 62500 49800 5 10 1 1 0 6 1
refdes=C83
T 62800 49800 5 10 1 1 0 0 1
value=100p
}
N 62000 49700 62000 49300 4
N 62000 49300 62200 49300 4
N 61300 49700 62200 49700 4
C 63400 49600 1 90 0 agnd.sym
N 63200 49700 63100 49700 4
C 63400 49200 1 90 0 agnd.sym
N 63200 49300 63100 49300 4
C 63100 49100 1 180 0 capacitor-1.sym
{
T 62900 48400 5 10 0 1 180 0 1
device=CAPACITOR
T 63100 49100 5 10 0 1 90 0 1
footprint=0402
T 62500 49000 5 10 1 1 0 6 1
refdes=C89
T 62800 49000 5 10 1 1 0 0 1
value=100p
}
C 63100 48700 1 180 0 capacitor-1.sym
{
T 62900 48000 5 10 0 1 180 0 1
device=CAPACITOR
T 63100 48700 5 10 0 1 90 0 1
footprint=0603
T 62500 48600 5 10 1 1 0 6 1
refdes=C91
T 62800 48600 5 10 1 1 0 0 1
value=10u
}
N 61300 48100 61400 48100 4
N 61400 48100 61400 47300 4
N 61300 48500 61600 48500 4
N 61600 48500 61600 47900 4
N 61600 47900 62200 47900 4
N 61300 49300 61800 49300 4
N 61800 48500 61800 49300 4
N 61800 48900 62200 48900 4
N 62200 48500 61800 48500 4
C 63400 48800 1 90 0 agnd.sym
N 63200 48900 63100 48900 4
C 63400 48400 1 90 0 agnd.sym
N 63200 48500 63100 48500 4
N 61300 51300 62200 51300 4
N 68600 40200 68600 41400 4
N 69400 40200 69400 41400 4
N 70200 40200 70200 41400 4
C 39900 55200 1 180 0 capacitor-1.sym
{
T 39700 54500 5 10 0 1 180 0 1
device=CAPACITOR
T 39900 55200 5 10 0 1 90 0 1
footprint=0402
T 39300 55100 5 10 1 1 0 6 1
refdes=C11
T 39600 55100 5 10 1 1 0 0 1
value=1n
}
N 40000 55300 40000 54800 4
C 41000 55200 1 180 0 capacitor-1.sym
{
T 40800 54500 5 10 0 1 180 0 1
device=CAPACITOR
T 41000 55200 5 10 0 1 90 0 1
footprint=0402
T 40400 55100 5 10 1 1 0 6 1
refdes=C12
T 40700 55100 5 10 1 1 0 0 1
value=100p
}
N 39900 55000 40000 55000 4
N 40000 55000 40100 55000 4
C 38800 55100 1 270 0 agnd.sym
C 41200 54900 1 90 0 agnd.sym
C 40300 57200 1 270 1 capacitor-1.sym
{
T 41000 57400 5 10 0 1 90 2 1
device=CAPACITOR
T 40300 57200 5 10 0 1 0 6 1
footprint=0402
T 40500 57800 5 10 1 1 0 0 1
refdes=C9
T 40500 57500 5 10 1 1 180 6 1
value=100p
}
C 39700 57200 1 270 1 capacitor-1.sym
{
T 40400 57400 5 10 0 1 90 2 1
device=CAPACITOR
T 39700 57200 5 10 0 1 0 6 1
footprint=0402
T 39900 57800 5 10 1 1 0 0 1
refdes=C7
T 39900 57500 5 10 1 1 180 6 1
value=100n
}
C 44500 57200 1 270 1 capacitor-1.sym
{
T 45200 57400 5 10 0 1 90 2 1
device=CAPACITOR
T 44500 57200 5 10 0 1 0 6 1
footprint=0402
T 44700 57800 5 10 1 1 0 0 1
refdes=C14
T 44700 57500 5 10 1 1 180 6 1
value=100p
}
C 43900 57200 1 270 1 capacitor-1.sym
{
T 44600 57400 5 10 0 1 90 2 1
device=CAPACITOR
T 43900 57200 5 10 0 1 0 6 1
footprint=0402
T 44100 57800 5 10 1 1 0 0 1
refdes=C13
T 44100 57500 5 10 1 1 180 6 1
value=100n
}
C 48800 57200 1 270 1 capacitor-1.sym
{
T 49500 57400 5 10 0 1 90 2 1
device=CAPACITOR
T 48800 57200 5 10 0 1 0 6 1
footprint=0402
T 49000 57800 5 10 1 1 0 0 1
refdes=C20
T 49000 57500 5 10 1 1 180 6 1
value=100p
}
C 48200 57200 1 270 1 capacitor-1.sym
{
T 48900 57400 5 10 0 1 90 2 1
device=CAPACITOR
T 48200 57200 5 10 0 1 0 6 1
footprint=0402
T 48400 57800 5 10 1 1 0 0 1
refdes=C19
T 48400 57500 5 10 1 1 180 6 1
value=100n
}
C 53400 57200 1 270 1 capacitor-1.sym
{
T 54100 57400 5 10 0 1 90 2 1
device=CAPACITOR
T 53400 57200 5 10 0 1 0 6 1
footprint=0402
T 53600 57800 5 10 1 1 0 0 1
refdes=C34
T 53600 57500 5 10 1 1 180 6 1
value=100p
}
C 52800 57200 1 270 1 capacitor-1.sym
{
T 53500 57400 5 10 0 1 90 2 1
device=CAPACITOR
T 52800 57200 5 10 0 1 0 6 1
footprint=0402
T 53000 57800 5 10 1 1 0 0 1
refdes=C33
T 53000 57500 5 10 1 1 180 6 1
value=100n
}
C 58600 57200 1 270 1 capacitor-1.sym
{
T 59300 57400 5 10 0 1 90 2 1
device=CAPACITOR
T 58600 57200 5 10 0 1 0 6 1
footprint=0402
T 58800 57800 5 10 1 1 0 0 1
refdes=C44
T 58800 57500 5 10 1 1 180 6 1
value=100p
}
C 58000 57200 1 270 1 capacitor-1.sym
{
T 58700 57400 5 10 0 1 90 2 1
device=CAPACITOR
T 58000 57200 5 10 0 1 0 6 1
footprint=0402
T 58200 57800 5 10 1 1 0 0 1
refdes=C42
T 58200 57500 5 10 1 1 180 6 1
value=100n
}
C 63500 57200 1 270 1 capacitor-1.sym
{
T 64200 57400 5 10 0 1 90 2 1
device=CAPACITOR
T 63500 57200 5 10 0 1 0 6 1
footprint=0402
T 63700 57800 5 10 1 1 0 0 1
refdes=C58
T 63700 57500 5 10 1 1 180 6 1
value=100p
}
C 62900 57200 1 270 1 capacitor-1.sym
{
T 63600 57400 5 10 0 1 90 2 1
device=CAPACITOR
T 62900 57200 5 10 0 1 0 6 1
footprint=0402
T 63100 57800 5 10 1 1 0 0 1
refdes=C55
T 63100 57500 5 10 1 1 180 6 1
value=100n
}
C 68500 57200 1 270 1 capacitor-1.sym
{
T 69200 57400 5 10 0 1 90 2 1
device=CAPACITOR
T 68500 57200 5 10 0 1 0 6 1
footprint=0402
T 68700 57800 5 10 1 1 0 0 1
refdes=C73
T 68700 57500 5 10 1 1 180 6 1
value=100p
}
C 67300 57200 1 270 1 capacitor-1.sym
{
T 68000 57400 5 10 0 1 90 2 1
device=CAPACITOR
T 67300 57200 5 10 0 1 0 6 1
footprint=0603
T 67500 57800 5 10 1 1 0 0 1
refdes=C67
T 67500 57500 5 10 1 1 180 6 1
value=10u
}
C 65600 55500 1 270 1 capacitor-1.sym
{
T 66300 55700 5 10 0 1 90 2 1
device=CAPACITOR
T 65600 55500 5 10 0 1 0 6 1
footprint=0402
T 65800 56100 5 10 1 1 0 0 1
refdes=C68
T 65800 55800 5 10 1 1 180 6 1
value=100n
}
C 66200 55500 1 270 1 capacitor-1.sym
{
T 66900 55700 5 10 0 1 90 2 1
device=CAPACITOR
T 66200 55500 5 10 0 1 0 6 1
footprint=0402
T 66400 56100 5 10 1 1 0 0 1
refdes=C70
T 66400 55800 5 10 1 1 180 6 1
value=100n
}
C 66800 55500 1 270 1 capacitor-1.sym
{
T 67500 55700 5 10 0 1 90 2 1
device=CAPACITOR
T 66800 55500 5 10 0 1 0 6 1
footprint=0402
T 67000 56100 5 10 1 1 0 0 1
refdes=C74
T 67000 55800 5 10 1 1 180 6 1
value=100n
}
C 67400 55500 1 270 1 capacitor-1.sym
{
T 68100 55700 5 10 0 1 90 2 1
device=CAPACITOR
T 67400 55500 5 10 0 1 0 6 1
footprint=0402
T 67600 56100 5 10 1 1 0 0 1
refdes=C78
T 67600 55800 5 10 1 1 180 6 1
value=100n
}
C 68000 55500 1 270 1 capacitor-1.sym
{
T 68700 55700 5 10 0 1 90 2 1
device=CAPACITOR
T 68000 55500 5 10 0 1 0 6 1
footprint=0402
T 68200 56100 5 10 1 1 0 0 1
refdes=C80
T 68200 55800 5 10 1 1 180 6 1
value=100n
}
C 69700 56400 1 0 1 vcc.sym
{
T 69700 58100 5 8 0 0 0 6 1
footprint=none
T 69700 57900 5 8 0 0 0 6 1
symversion=1.0
T 69700 56400 5 10 0 1 0 6 1
net=3V3_3:1
T 69500 56500 5 10 1 1 0 6 1
value=3V3_3
}
N 65800 56400 69600 56400 4
N 65800 55500 68200 55500 4
N 69600 56400 69600 55500 4
C 71500 55500 1 270 1 capacitor-1.sym
{
T 72200 55700 5 10 0 1 90 2 1
device=CAPACITOR
T 71500 55500 5 10 0 1 0 6 1
footprint=0402
T 71700 56100 5 10 1 1 0 0 1
refdes=C97
T 71700 55800 5 10 1 1 180 6 1
value=100n
}
N 71700 56400 71200 56400 4
C 73600 51500 1 180 0 capacitor-1.sym
{
T 73400 50800 5 10 0 1 180 0 1
device=CAPACITOR
T 73600 51500 5 10 0 1 90 0 1
footprint=0402
T 73000 51100 5 10 1 1 0 6 1
refdes=C108
T 73300 51100 5 10 1 1 0 0 1
value=100n
}
C 74000 51200 1 90 0 agnd.sym
N 72700 51300 72500 51300 4
N 72500 51300 72500 50900 4
N 73800 51300 73600 51300 4
C 66600 40500 1 270 1 capacitor-1.sym
{
T 67300 40700 5 10 0 1 90 2 1
device=CAPACITOR
T 66600 40500 5 10 0 1 0 6 1
footprint=0402
T 66800 41100 5 10 1 1 0 0 1
refdes=C116
T 66800 40800 5 10 1 1 180 6 1
value=10n
}
C 67200 40500 1 270 1 capacitor-1.sym
{
T 67900 40700 5 10 0 1 90 2 1
device=CAPACITOR
T 67200 40500 5 10 0 1 0 6 1
footprint=0402
T 67400 41100 5 10 1 1 0 0 1
refdes=C117
T 67400 40800 5 10 1 1 180 6 1
value=100n
}
C 67800 40500 1 270 1 capacitor-1.sym
{
T 68500 40700 5 10 0 1 90 2 1
device=CAPACITOR
T 67800 40500 5 10 0 1 0 6 1
footprint=0603
T 68000 41100 5 10 1 1 0 0 1
refdes=C118
T 68000 40800 5 10 1 1 180 6 1
value=10u
}
N 66800 40500 68000 40500 4
N 66800 41400 68600 41400 4
C 67300 40300 1 0 0 agnd.sym
C 69500 40500 1 270 1 capacitor-1.sym
{
T 70200 40700 5 10 0 1 90 2 1
device=CAPACITOR
T 69500 40500 5 10 0 1 0 6 1
footprint=0402
T 69700 41100 5 10 1 1 0 0 1
refdes=C120
T 69700 40800 5 10 1 1 180 6 1
value=1u
}
C 69600 40300 1 0 0 agnd.sym
N 69700 41400 69400 41400 4
C 70300 40500 1 270 1 capacitor-1.sym
{
T 71000 40700 5 10 0 1 90 2 1
device=CAPACITOR
T 70300 40500 5 10 0 1 0 6 1
footprint=0402
T 70500 41100 5 10 1 1 0 0 1
refdes=C121
T 70500 40800 5 10 1 1 180 6 1
value=1u
}
C 70400 40300 1 0 0 agnd.sym
N 70500 41400 70200 41400 4
C 67300 33200 1 180 0 resistor-2.sym
{
T 66900 32850 5 10 0 1 180 0 1
device=RESISTOR
T 66800 33000 5 10 1 1 180 0 1
refdes=R61
T 66900 33000 5 10 1 1 180 6 1
value=10k
T 67300 33200 5 10 0 1 0 0 1
footprint=0402
}
N 67300 33100 67600 33100 4
C 66200 33100 1 0 0 vcc.sym
{
T 66200 34800 5 8 0 0 0 0 1
footprint=none
T 66200 34600 5 8 0 0 0 0 1
symversion=1.0
T 66200 33100 5 10 0 1 0 0 1
net=3V3:1
T 65900 33200 5 10 1 1 0 0 1
value=3V3
}
C 67500 33100 1 0 1 testpt-1.sym
{
T 67100 34000 5 10 0 1 0 6 1
device=TESTPOINT
T 67100 33800 5 10 0 1 0 6 1
footprint=JUMPER1
T 67600 33500 5 10 1 1 0 6 1
refdes=TP13
T 67500 33100 5 10 0 1 0 6 1
value=PLS
}
N 66300 33100 66400 33100 4
C 71200 43600 1 180 0 resistor-2.sym
{
T 70800 43250 5 10 0 1 180 0 1
device=RESISTOR
T 70700 43400 5 10 1 1 180 0 1
refdes=R56
T 70800 43400 5 10 1 1 180 6 1
value=1k
T 71200 43600 5 10 0 1 0 0 1
footprint=0603
}
C 70200 43500 1 90 0 resistor-2.sym
{
T 69850 43900 5 10 0 1 90 0 1
device=RESISTOR
T 69900 44000 5 10 1 1 0 6 1
refdes=R53
T 69900 43800 5 10 1 1 180 0 1
value=1k
T 70200 43500 5 10 0 1 0 0 1
footprint=0603
}
C 71600 43400 1 0 0 io-1.sym
{
T 72500 43600 5 10 0 0 0 0 1
net=SPI_SDIO:1
T 71800 44000 5 10 0 0 0 0 1
device=none
T 72500 43500 5 10 1 1 0 1 1
value=SPI_SDIO
}
N 71600 43500 71200 43500 4
N 69600 43500 70300 43500 4
N 69600 43100 71400 43100 4
N 71400 43100 71400 43500 4
C 66400 43600 1 180 1 input-1.sym
{
T 66400 43300 5 10 0 0 180 6 1
device=INPUT
T 66400 43600 5 10 0 0 180 6 1
net=SPI_MOSI:1
T 66300 43400 5 10 1 1 0 6 1
value=SPI_MOSI
}
N 67200 43500 67600 43500 4
C 67200 43000 1 0 1 output-1.sym
{
T 67100 43300 5 10 0 0 0 6 1
device=OUTPUT
T 67200 43000 5 10 0 0 0 6 1
net=SPI_MISO:1
T 66300 43000 5 10 1 1 0 6 1
value=SPI_MISO
}
N 67200 43100 67600 43100 4
C 68700 45100 1 0 1 vcc.sym
{
T 68700 46800 5 8 0 0 0 6 1
footprint=none
T 68700 46600 5 8 0 0 0 6 1
symversion=1.0
T 68700 45100 5 10 0 1 0 6 1
net=3V3:1
T 68500 45200 5 10 1 1 0 6 1
value=3V3
}
C 66200 42700 1 0 1 vcc.sym
{
T 66200 44400 5 8 0 0 0 6 1
footprint=none
T 66200 44200 5 8 0 0 0 6 1
symversion=1.0
T 66200 42700 5 10 0 1 0 6 1
net=3V3:1
T 66000 42700 5 10 1 1 0 6 1
value=3V3
}
C 67200 42800 1 180 0 resistor-2.sym
{
T 66800 42450 5 10 0 1 180 0 1
device=RESISTOR
T 66700 42600 5 10 1 1 180 0 1
refdes=R50
T 66800 42600 5 10 1 1 180 6 1
value=1k
T 67200 42800 5 10 0 1 0 0 1
footprint=0603
}
N 66100 42700 66300 42700 4
N 67400 43100 67400 42700 4
N 67400 42700 67200 42700 4
N 68600 45100 68600 44200 4
C 67200 44200 1 270 1 capacitor-1.sym
{
T 67900 44400 5 10 0 1 90 2 1
device=CAPACITOR
T 67200 44200 5 10 0 1 0 6 1
footprint=0402
T 67400 44800 5 10 1 1 0 0 1
refdes=C110
T 67400 44500 5 10 1 1 180 6 1
value=100n
}
N 67400 45100 70100 45100 4
N 70100 45100 70100 44400 4
C 67300 44000 1 0 0 agnd.sym
C 68500 42200 1 0 0 agnd.sym
C 31400 58100 1 180 0 capacitor-1.sym
{
T 31200 57400 5 10 0 1 180 0 1
device=CAPACITOR
T 31400 58100 5 10 0 1 90 0 1
footprint=0402
T 30800 58000 5 10 1 1 0 6 1
refdes=C1
T 31100 58000 5 10 1 1 0 0 1
value=1u
}
C 32500 58100 1 180 0 capacitor-1.sym
{
T 32300 57400 5 10 0 1 180 0 1
device=CAPACITOR
T 32500 58100 5 10 0 1 90 0 1
footprint=0402
T 31900 58000 5 10 1 1 0 6 1
refdes=C2
T 32200 58000 5 10 1 1 0 0 1
value=100n
}
N 31400 57900 31600 57900 4
N 31500 57600 31500 57900 4
C 31400 58200 1 0 0 vcc.sym
{
T 31400 59900 5 8 0 0 0 0 1
footprint=none
T 31400 59700 5 8 0 0 0 0 1
symversion=1.0
T 31400 58200 5 10 0 1 0 0 1
net=14V:1
T 31600 58300 5 10 1 1 0 0 1
value=14V
}
N 31500 58200 31500 57900 4
C 30300 58000 1 270 0 agnd.sym
C 32700 57800 1 90 0 agnd.sym
C 31400 56600 1 0 0 agnd.sym
C 33300 58500 1 0 1 resistor-2.sym
{
T 32900 58850 5 10 0 1 0 6 1
device=RESISTOR
T 32800 58700 5 10 1 1 0 6 1
refdes=R4
T 32900 58700 5 10 1 1 0 0 1
value=2.7k
T 33300 58500 5 10 0 1 0 0 1
footprint=0603
}
N 32000 57200 34100 57200 4
N 33300 58600 34100 58600 4
N 32400 58600 29800 58600 4
C 29800 58500 1 0 1 resistor-2.sym
{
T 29400 58850 5 10 0 1 0 6 1
device=RESISTOR
T 29300 58700 5 10 1 1 0 6 1
refdes=R1
T 29400 58700 5 10 1 1 0 0 1
value=1.5k
T 29800 58500 5 10 0 1 0 0 1
footprint=0603
}
N 28700 58600 28900 58600 4
N 30000 58600 30000 57400 4
N 30000 57400 31000 57400 4
N 71400 39100 71200 39100 4
N 71400 38700 71200 38700 4
C 28900 57100 1 180 1 input-1.sym
{
T 28900 56800 5 10 0 0 180 6 1
device=INPUT
T 28900 57100 5 10 0 0 180 6 1
net=VBWCTL:1
T 28800 56900 5 10 1 1 0 6 1
value=VBWCTL
}
C 28900 55400 1 180 1 input-1.sym
{
T 28900 55100 5 10 0 0 180 6 1
device=INPUT
T 28900 55400 5 10 0 0 180 6 1
net=VFCTL:1
T 28800 55200 5 10 1 1 0 6 1
value=VFCTL
}
N 32000 55500 33300 55500 4
C 33300 56100 1 0 1 resistor-2.sym
{
T 32900 56450 5 10 0 1 0 6 1
device=RESISTOR
T 32800 56300 5 10 1 1 0 6 1
refdes=R6
T 32900 56300 5 10 1 1 0 0 1
value=2.7k
T 33300 56100 5 10 0 1 0 0 1
footprint=0603
}
C 30000 56100 1 0 1 resistor-2.sym
{
T 29600 56450 5 10 0 1 0 6 1
device=RESISTOR
T 29500 56300 5 10 1 1 0 6 1
refdes=R2
T 29600 56300 5 10 1 1 0 0 1
value=1.5k
T 30000 56100 5 10 0 1 0 0 1
footprint=0603
}
N 28900 56200 29100 56200 4
N 30000 56200 32400 56200 4
N 31000 55700 30000 55700 4
N 30000 55700 30000 56200 4
C 37900 37800 1 0 0 testpt-1.sym
{
T 38300 38700 5 10 0 1 0 0 1
device=TESTPOINT
T 38300 38500 5 10 0 1 0 0 1
footprint=JUMPER1
T 38100 37900 5 10 1 1 0 0 1
refdes=TP1
T 37900 37800 5 10 0 1 0 0 1
value=PLS
}
N 47300 42700 47100 42700 4
C 28000 53200 1 180 0 capacitor-1.sym
{
T 27800 52500 5 10 0 1 180 0 1
device=CAPACITOR
T 28000 53200 5 10 0 1 90 0 1
footprint=0402
T 27400 52800 5 10 1 1 0 6 1
refdes=C4
T 27700 52800 5 10 1 1 0 0 1
value=100p
}
C 27700 54000 1 270 0 agnd.sym
C 31500 53200 1 180 0 capacitor-1.sym
{
T 31300 52500 5 10 0 1 180 0 1
device=CAPACITOR
T 31500 53200 5 10 0 1 90 0 1
footprint=0402
T 30900 53100 5 10 1 1 0 6 1
refdes=C6
T 31200 53100 5 10 1 1 0 0 1
value=100p
}
N 30000 53000 30600 53000 4
N 31500 54100 31800 54100 4
C 28500 58700 1 270 0 agnd.sym
C 30800 56900 1 0 1 resistor-2.sym
{
T 30400 57250 5 10 0 1 0 6 1
device=RESISTOR
T 30300 57100 5 10 1 1 0 6 1
refdes=R3
T 30400 57100 5 10 1 1 0 0 1
value=3.3k
T 30800 56900 5 10 0 1 0 0 1
footprint=0603
}
N 29700 57000 29900 57000 4
N 30800 57000 31000 57000 4
C 28700 56300 1 270 0 agnd.sym
C 30800 55200 1 0 1 resistor-2.sym
{
T 30400 55550 5 10 0 1 0 6 1
device=RESISTOR
T 30300 55400 5 10 1 1 0 6 1
refdes=R5
T 30400 55400 5 10 1 1 0 0 1
value=3.3k
T 30800 55200 5 10 0 1 0 0 1
footprint=0603
}
N 30800 55300 31000 55300 4
N 29700 55300 29900 55300 4
C 29100 54400 1 0 0 inductor-1.sym
{
T 29300 54900 5 10 0 1 0 0 1
device=INDUCTOR
T 29500 54600 5 10 1 1 0 6 1
refdes=L1
T 29600 54600 5 10 0 1 0 0 1
value=0603CS-33NXGL
T 29100 54400 5 10 0 1 0 0 1
footprint=0603
T 29600 54600 5 10 1 1 0 0 1
comment=33n
}
N 30500 54500 30500 53000 4
N 29100 54500 29000 54500 4
N 28600 51900 28600 51700 4
N 28600 51700 29400 51700 4
N 29400 51900 29400 51700 4
N 29000 51900 29000 51700 4
C 30000 53700 1 0 1 capacitor-1.sym
{
T 29800 54400 5 10 0 1 180 2 1
device=CAPACITOR
T 30000 53700 5 10 0 1 90 6 1
footprint=0402
T 29500 54200 5 10 1 1 0 6 1
refdes=C5
T 29600 54200 5 10 1 1 0 0 1
value=1n
}
C 28900 54100 1 180 0 capacitor-1.sym
{
T 28700 53400 5 10 0 1 180 0 1
device=CAPACITOR
T 28900 54100 5 10 0 1 90 0 1
footprint=0402
T 28400 54200 5 10 1 1 0 6 1
refdes=C3
T 28500 54200 5 10 1 1 0 0 1
value=100p
}
N 30000 54500 30500 54500 4
C 29100 54600 1 0 1 vcc.sym
{
T 29100 56300 5 8 0 0 0 6 1
footprint=none
T 29100 56100 5 8 0 0 0 6 1
symversion=1.0
T 29100 54600 5 10 0 1 0 6 1
net=5V:1
T 28900 54600 5 10 1 1 0 6 1
value=5V
}
N 29000 54600 29000 53700 4
N 28900 53900 29000 53900 4
N 29000 53900 29100 53900 4
N 30100 53900 30000 53900 4
N 27900 53900 28000 53900 4
C 37800 51400 1 180 0 resistor-2.sym
{
T 37400 51050 5 10 0 1 180 0 1
device=RESISTOR
T 37300 51200 5 10 1 1 180 0 1
refdes=R8
T 37400 51200 5 10 1 1 180 6 1
value=10k
T 37800 51400 5 10 0 1 0 0 1
footprint=0402
}
N 37800 51300 38100 51300 4
N 36600 51300 36900 51300 4
C 44200 53900 1 180 0 capacitor-1.sym
{
T 44000 53200 5 10 0 1 180 0 1
device=CAPACITOR
T 44200 53900 5 10 0 1 90 0 1
footprint=0402
T 43600 53800 5 10 1 1 0 6 1
refdes=C18
T 43900 53800 5 10 1 1 0 0 1
value=100p
}
N 41900 53700 43300 53700 4
N 44200 53700 44300 53700 4
C 48600 53900 1 180 0 capacitor-1.sym
{
T 48400 53200 5 10 0 1 180 0 1
device=CAPACITOR
T 48600 53900 5 10 0 1 90 0 1
footprint=0402
T 48000 53800 5 10 1 1 0 6 1
refdes=C28
T 48300 53800 5 10 1 1 0 0 1
value=100p
}
N 47700 53700 46300 53700 4
N 48600 53700 49100 53700 4
C 42900 55800 1 0 0 inductor-1.sym
{
T 43100 56300 5 10 0 1 0 0 1
device=INDUCTOR
T 43300 56000 5 10 1 1 0 6 1
refdes=L4
T 43400 56000 5 10 0 1 0 0 1
value=0603CS-23NXJL
T 42900 55800 5 10 0 1 0 0 1
footprint=0603
T 43400 56000 5 10 1 1 0 0 1
comment=23n
}
C 43700 54900 1 270 1 capacitor-1.sym
{
T 44400 55100 5 10 0 1 90 2 1
device=CAPACITOR
T 43700 54900 5 10 0 1 0 6 1
footprint=0402
T 44000 55500 5 10 1 1 0 0 1
refdes=C15
T 44000 55200 5 10 1 1 180 6 1
value=100p
}
C 44300 54900 1 270 1 capacitor-1.sym
{
T 45000 55100 5 10 0 1 90 2 1
device=CAPACITOR
T 44300 54900 5 10 0 1 0 6 1
footprint=0402
T 44600 55500 5 10 1 1 0 0 1
refdes=C16
T 44600 55200 5 10 1 1 180 6 1
value=1n
}
C 44900 54900 1 270 1 capacitor-1.sym
{
T 45600 55100 5 10 0 1 90 2 1
device=CAPACITOR
T 44900 54900 5 10 0 1 0 6 1
footprint=0603
T 45200 55500 5 10 1 1 0 0 1
refdes=C17
T 45200 55200 5 10 1 1 180 6 1
value=2.2u
}
C 44400 54500 1 0 0 agnd.sym
N 43900 54700 45100 54700 4
N 43900 54900 43900 54700 4
N 44500 54900 44500 54700 4
N 45100 54900 45100 54700 4
N 43800 55900 45200 55900 4
N 43900 55900 43900 55800 4
N 44500 55900 44500 55800 4
N 45100 55900 45100 55800 4
C 46100 56000 1 180 0 resistor-2.sym
{
T 45700 55650 5 10 0 1 180 0 1
device=RESISTOR
T 45600 56000 5 10 1 1 0 6 1
refdes=R9
T 45700 56000 5 10 1 1 0 0 1
value=1.8
T 46100 56000 5 10 0 1 0 0 1
footprint=1206
}
C 46400 55900 1 0 1 vcc.sym
{
T 46400 57600 5 8 0 0 0 6 1
footprint=none
T 46400 57400 5 8 0 0 0 6 1
symversion=1.0
T 46400 55900 5 10 0 1 0 6 1
net=5V:1
T 46400 56000 5 10 1 1 0 0 1
value=5V
}
N 46300 55900 46100 55900 4
N 42700 55900 42700 53700 4
N 42900 55900 42700 55900 4
C 46900 55800 1 0 0 inductor-1.sym
{
T 47100 56300 5 10 0 1 0 0 1
device=INDUCTOR
T 46900 55800 5 10 0 1 0 0 1
footprint=0805
T 47300 56000 5 10 1 1 0 6 1
refdes=L6
T 47400 56000 5 10 1 1 0 0 1
comment=470n
T 46900 55800 5 10 0 1 0 0 1
value=LQW2BHNR47J03L
}
C 47700 54900 1 270 1 capacitor-1.sym
{
T 48400 55100 5 10 0 1 90 2 1
device=CAPACITOR
T 47700 54900 5 10 0 1 0 6 1
footprint=0402
T 48000 55500 5 10 1 1 0 0 1
refdes=C21
T 48000 55200 5 10 1 1 180 6 1
value=100p
}
C 48300 54900 1 270 1 capacitor-1.sym
{
T 49000 55100 5 10 0 1 90 2 1
device=CAPACITOR
T 48300 54900 5 10 0 1 0 6 1
footprint=0402
T 48600 55500 5 10 1 1 0 0 1
refdes=C22
T 48600 55200 5 10 1 1 180 6 1
value=1n
}
C 48900 54900 1 270 1 capacitor-1.sym
{
T 49600 55100 5 10 0 1 90 2 1
device=CAPACITOR
T 48900 54900 5 10 0 1 0 6 1
footprint=0603
T 49200 55500 5 10 1 1 0 0 1
refdes=C25
T 49200 55200 5 10 1 1 180 6 1
value=2.2u
}
C 48400 54500 1 0 0 agnd.sym
N 47900 54700 49100 54700 4
N 47900 54900 47900 54700 4
N 48500 54900 48500 54700 4
N 49100 54900 49100 54700 4
N 47800 55900 49200 55900 4
N 47900 55900 47900 55800 4
N 48500 55900 48500 55800 4
N 49100 55900 49100 55800 4
C 50100 56000 1 180 0 resistor-2.sym
{
T 49700 55650 5 10 0 1 180 0 1
device=RESISTOR
T 50100 56000 5 10 0 1 0 0 1
footprint=1206
T 49600 56000 5 10 1 1 0 6 1
refdes=R12
T 49700 56000 5 10 1 1 0 0 1
value=1.8
}
C 50400 55900 1 0 1 vcc.sym
{
T 50400 57600 5 8 0 0 0 6 1
footprint=none
T 50400 57400 5 8 0 0 0 6 1
symversion=1.0
T 50400 55900 5 10 0 1 0 6 1
net=5V:1
T 50400 56000 5 10 1 1 0 0 1
value=5V
}
N 50300 55900 50100 55900 4
N 46900 55900 46700 55900 4
N 46700 55900 46700 53700 4
C 35800 42200 1 270 1 capacitor-1.sym
{
T 36500 42400 5 10 0 1 90 2 1
device=CAPACITOR
T 35800 42200 5 10 0 1 0 6 1
footprint=0603
T 36100 42800 5 10 1 1 0 0 1
refdes=C26
T 36100 42500 5 10 1 1 180 6 1
value=2.2u
}
C 35900 42000 1 0 0 agnd.sym
N 36000 43500 36000 43100 4
C 48200 42900 1 180 0 capacitor-1.sym
{
T 48000 42200 5 10 0 1 180 0 1
device=CAPACITOR
T 48200 42900 5 10 0 1 90 0 1
footprint=0402
T 47600 42800 5 10 1 1 0 6 1
refdes=C52
T 47900 42800 5 10 1 1 0 0 1
value=10n
}
C 49700 44500 1 180 0 capacitor-1.sym
{
T 49500 43800 5 10 0 1 180 0 1
device=CAPACITOR
T 49700 44500 5 10 0 1 90 0 1
footprint=0402
T 49100 44400 5 10 1 1 0 6 1
refdes=C53
T 49400 44400 5 10 1 1 0 0 1
value=10n
}
C 62200 51200 1 0 0 output-1.sym
{
T 62300 51500 5 10 0 0 0 0 1
device=OUTPUT
T 62200 51200 5 10 0 0 0 0 1
net=MUXOUT:1
T 63100 51200 5 10 1 1 0 0 1
value=MUXOUT
}
N 71400 34300 71200 34300 4
N 71400 38300 71200 38300 4
C 65300 35100 1 270 1 resistor-2.sym
{
T 65650 35500 5 10 0 1 90 2 1
device=RESISTOR
T 65300 35100 5 10 0 1 0 6 1
footprint=0402
T 65600 35600 5 10 1 1 0 0 1
refdes=R58
T 65600 35500 5 10 1 1 180 6 1
value=10k
}
C 65500 36100 1 0 1 vcc.sym
{
T 65500 37800 5 8 0 0 0 6 1
footprint=none
T 65500 37600 5 8 0 0 0 6 1
symversion=1.0
T 65500 36100 5 10 0 1 0 6 1
net=3V3:1
T 65800 36200 5 10 1 1 0 6 1
value=3V3
}
C 66100 36000 1 270 0 agnd.sym
C 67300 36100 1 180 0 capacitor-1.sym
{
T 67100 35400 5 10 0 1 180 0 1
device=CAPACITOR
T 67300 36100 5 10 0 1 90 0 1
footprint=0402
T 66800 36100 5 10 1 1 0 6 1
refdes=C122
T 66900 36100 5 10 1 1 0 0 1
value=100p
}
C 67300 35600 1 180 0 capacitor-1.sym
{
T 67100 34900 5 10 0 1 180 0 1
device=CAPACITOR
T 67300 35600 5 10 0 1 90 0 1
footprint=0402
T 66800 35500 5 10 1 1 0 6 1
refdes=C123
T 66900 35500 5 10 1 1 0 0 1
value=100n
}
N 66400 35900 66300 35900 4
N 66300 35900 66300 35400 4
N 66300 35400 66400 35400 4
N 67300 35900 67600 35900 4
N 67400 35900 67400 35400 4
N 67400 35400 67300 35400 4
N 65400 36100 65400 36000 4
N 65200 35100 67600 35100 4
N 67300 34700 67600 34700 4
N 67300 34300 67600 34300 4
N 67300 33900 67600 33900 4
N 71400 39500 71200 39500 4
C 56600 46300 1 270 0 capacitor-1.sym
{
T 57300 46100 5 10 0 1 270 0 1
device=CAPACITOR
T 56600 46300 5 10 0 1 180 0 1
footprint=0402
T 56900 46000 5 10 1 1 0 0 1
refdes=C75
T 56900 45700 5 10 1 1 180 6 1
value=100p
}
C 63100 46900 1 180 0 capacitor-1.sym
{
T 62900 46200 5 10 0 1 180 0 1
device=CAPACITOR
T 63100 46900 5 10 0 1 90 0 1
footprint=0402
T 62500 46800 5 10 1 1 0 6 1
refdes=C98
T 62800 46800 5 10 1 1 0 0 1
value=100p
}
N 64900 46700 63100 46700 4
N 54200 46700 62200 46700 4
C 61600 51300 1 0 0 testpt-1.sym
{
T 62000 52200 5 10 0 1 0 0 1
device=TESTPOINT
T 62000 52000 5 10 0 1 0 0 1
footprint=JUMPER1
T 61800 51500 5 10 1 1 0 0 1
refdes=TP5
T 61600 51300 5 10 0 1 0 0 1
value=PLS
}
C 61700 44900 1 180 0 capacitor-1.sym
{
T 61500 44200 5 10 0 1 180 0 1
device=CAPACITOR
T 61700 44900 5 10 0 1 90 0 1
footprint=0402
T 61100 44800 5 10 1 1 0 6 1
refdes=C99
T 61400 44800 5 10 1 1 0 0 1
value=10n
}
N 61700 44700 62000 44700 4
N 60800 44700 60500 44700 4
C 60800 43300 1 270 0 resistor-2.sym
{
T 61150 42900 5 10 0 1 270 0 1
device=RESISTOR
T 61100 43000 5 10 1 1 0 0 1
refdes=R36
T 61100 42700 5 10 1 1 180 6 1
value=10k
T 60800 43300 5 10 0 1 90 0 1
footprint=0402
}
C 62100 43300 1 270 0 resistor-2.sym
{
T 62450 42900 5 10 0 1 270 0 1
device=RESISTOR
T 62400 43000 5 10 1 1 0 0 1
refdes=R39
T 62400 42700 5 10 1 1 180 6 1
value=10k
T 62100 43300 5 10 0 1 90 0 1
footprint=0402
}
C 67300 51000 1 180 0 resistor-2.sym
{
T 66900 50650 5 10 0 1 180 0 1
device=RESISTOR
T 66800 51100 5 10 1 1 0 6 1
refdes=R32
T 66900 51100 5 10 1 1 0 0 1
value=10k
T 67300 51000 5 10 0 1 0 0 1
footprint=0402
}
N 67500 50500 67500 50900 4
N 67500 50900 67300 50900 4
N 66200 51300 66200 50900 4
N 66200 50900 66400 50900 4
C 56300 53900 1 180 0 capacitor-1.sym
{
T 56100 53200 5 10 0 1 180 0 1
device=CAPACITOR
T 56300 53900 5 10 0 1 90 0 1
footprint=0603
T 55700 53800 5 10 1 1 0 6 1
refdes=C46
T 56000 53800 5 10 1 1 0 0 1
value=DNI
}
N 56300 53700 56700 53700 4
N 55100 53700 55400 53700 4
C 56200 51800 1 180 0 resistor-2.sym
{
T 55800 51450 5 10 0 1 180 0 1
device=RESISTOR
T 55700 51900 5 10 1 1 0 6 1
refdes=R19
T 55800 51900 5 10 1 1 0 0 1
value=10k
T 56200 51800 5 10 0 1 0 0 1
footprint=0402
}
N 55100 52100 55100 51700 4
N 55100 51700 55300 51700 4
N 56200 51700 56500 51700 4
N 56500 51700 56500 51300 4
N 49700 39900 49200 39900 4
N 49200 39800 49200 40000 4
N 50000 40600 49700 40600 4
N 49700 40600 49700 41000 4
C 49000 40900 1 270 0 capacitor-1.sym
{
T 49700 40700 5 10 0 1 270 0 1
device=CAPACITOR
T 49000 40900 5 10 0 1 0 0 1
footprint=0603
T 49100 40700 5 10 1 1 180 0 1
refdes=C63
T 49100 40300 5 10 1 1 180 0 1
value=470n
}
N 49200 40900 49200 41000 4
N 52000 41000 54400 41000 4
C 53100 40400 1 180 0 capacitor-1.sym
{
T 52900 39700 5 10 0 1 180 0 1
device=CAPACITOR
T 53100 40400 5 10 0 1 270 0 1
footprint=0402
T 52200 40000 5 10 1 1 0 0 1
refdes=C81
T 53200 40000 5 10 1 1 0 6 1
value=470p
}
N 53400 40200 53400 41000 4
C 53800 40900 1 270 0 capacitor-1.sym
{
T 54500 40700 5 10 0 1 270 0 1
device=CAPACITOR
T 53800 40900 5 10 0 1 0 0 1
footprint=0402
T 54100 40700 5 10 1 1 180 6 1
refdes=C88
T 54100 40300 5 10 1 1 180 6 1
value=1u
}
N 54000 41000 54000 40900 4
N 39500 41000 50000 41000 4
C 54300 41000 1 0 0 vcc.sym
{
T 54300 42700 5 8 0 0 0 0 1
footprint=none
T 54300 42500 5 8 0 0 0 0 1
symversion=1.0
T 54300 41000 5 10 0 0 0 0 1
net=3V3_2:1
T 54500 41000 5 10 1 1 0 0 1
value=3V3_2
}
N 49700 39900 49700 40200 4
N 49700 40200 50000 40200 4
C 52200 40500 1 0 0 resistor-2.sym
{
T 52600 40850 5 10 0 1 0 0 1
device=RESISTOR
T 52200 40500 5 10 0 1 0 0 1
footprint=0603
T 52200 40900 5 10 1 1 180 6 1
refdes=R27
T 53200 40900 5 10 1 1 180 0 1
value=330k
}
C 53900 41000 1 0 0 testpt-1.sym
{
T 54300 41900 5 10 0 1 0 0 1
device=TESTPOINT
T 54300 41700 5 10 0 1 0 0 1
footprint=JUMPER1
T 53900 41000 5 10 0 1 0 0 1
value=PLS
T 54000 41400 5 10 1 1 0 0 1
refdes=TP7
}
N 52000 40200 52200 40200 4
N 53100 40200 53400 40200 4
N 53100 40600 53400 40600 4
N 52000 40600 52200 40600 4
N 48100 36400 48100 41000 4
N 50000 37700 49200 37700 4
N 49200 37600 49200 37800 4
N 52000 38900 54500 38900 4
N 52300 38100 52300 38900 4
N 52300 38500 52000 38500 4
N 52300 38100 52000 38100 4
C 52600 38700 1 270 0 capacitor-1.sym
{
T 53300 38500 5 10 0 1 270 0 1
device=CAPACITOR
T 52600 38700 5 10 0 1 0 0 1
footprint=0402
T 52900 38500 5 10 1 1 180 6 1
refdes=C93
T 52900 38100 5 10 1 1 180 6 1
value=470p
}
N 52000 37700 52800 37700 4
N 52800 37700 52800 37800 4
N 52800 38900 52800 38700 4
C 53400 38700 1 270 0 capacitor-1.sym
{
T 54100 38500 5 10 0 1 270 0 1
device=CAPACITOR
T 53400 38700 5 10 0 1 0 0 1
footprint=0402
T 53700 38500 5 10 1 1 180 6 1
refdes=C96
T 53700 38100 5 10 1 1 180 6 1
value=1u
}
N 53600 38900 53600 38700 4
N 53600 37800 53600 37700 4
N 50000 38500 49700 38500 4
N 49700 38100 49700 38900 4
C 49000 38700 1 270 0 capacitor-1.sym
{
T 49700 38500 5 10 0 1 270 0 1
device=CAPACITOR
T 49000 38700 5 10 0 1 0 0 1
footprint=0402
T 49100 38500 5 10 1 1 180 0 1
refdes=C72
T 49100 38100 5 10 1 1 180 0 1
value=1u
}
N 50000 38100 49700 38100 4
N 49200 38700 49200 38900 4
C 54400 38900 1 0 0 vcc.sym
{
T 54400 40600 5 8 0 0 0 0 1
footprint=none
T 54400 40400 5 8 0 0 0 0 1
symversion=1.0
T 54400 38900 5 10 0 1 0 0 1
net=3V3_3:1
T 54600 38900 5 10 1 1 0 0 1
value=3V3_3
}
C 53500 37500 1 0 0 agnd.sym
C 49100 37400 1 0 0 agnd.sym
C 53500 38900 1 0 0 testpt-1.sym
{
T 53900 39800 5 10 0 1 0 0 1
device=TESTPOINT
T 53900 39600 5 10 0 1 0 0 1
footprint=JUMPER1
T 53500 38900 5 10 0 1 0 0 1
value=PLS
T 53600 39300 5 10 1 1 0 0 1
refdes=TP8
}
N 48100 38900 50000 38900 4
N 48100 36400 50000 36400 4
C 49400 35500 1 90 0 capacitor-1.sym
{
T 48700 35700 5 10 0 1 90 0 1
device=CAPACITOR
T 49400 35500 5 10 0 1 0 0 1
footprint=0402
T 49100 36100 5 10 1 1 0 6 1
refdes=C85
T 49100 35800 5 10 1 1 180 0 1
value=1u
}
C 49100 35300 1 0 0 agnd.sym
N 50000 36000 49700 36000 4
C 50900 34600 1 0 0 agnd.sym
N 50600 34900 50600 34800 4
N 50600 34800 51400 34800 4
N 51400 34900 51400 34800 4
N 51000 34900 51000 34800 4
C 54500 35500 1 90 0 capacitor-1.sym
{
T 53800 35700 5 10 0 1 90 0 1
device=CAPACITOR
T 54500 35500 5 10 0 1 0 0 1
footprint=0402
T 54200 36100 5 10 1 1 0 6 1
refdes=C101
T 54200 35800 5 10 1 1 180 0 1
value=1u
}
C 54200 35300 1 0 0 agnd.sym
N 54300 36400 52000 36400 4
N 52000 36000 52300 36000 4
N 52300 36000 52300 36400 4
C 54200 36400 1 0 0 vcc.sym
{
T 54200 38100 5 8 0 0 0 0 1
footprint=none
T 54200 37900 5 8 0 0 0 0 1
symversion=1.0
T 54200 36400 5 10 0 1 0 0 1
net=5V_2:1
T 54400 36500 5 10 1 1 0 0 1
value=5V_2
}
C 53200 36400 1 0 0 testpt-1.sym
{
T 53600 37300 5 10 0 1 0 0 1
device=TESTPOINT
T 53600 37100 5 10 0 1 0 0 1
footprint=JUMPER1
T 53200 36400 5 10 0 1 0 0 1
value=PLS
T 53400 36500 5 10 1 1 0 0 1
refdes=TP9
}
N 41700 38600 40900 38600 4
N 40900 38500 40900 38700 4
N 43700 39800 46200 39800 4
N 44000 39000 44000 39800 4
N 44000 39400 43700 39400 4
N 44000 39000 43700 39000 4
C 44300 39600 1 270 0 capacitor-1.sym
{
T 45000 39400 5 10 0 1 270 0 1
device=CAPACITOR
T 44300 39600 5 10 0 1 0 0 1
footprint=0402
T 44600 39400 5 10 1 1 180 6 1
refdes=C54
T 44600 39000 5 10 1 1 180 6 1
value=470p
}
N 43700 38600 44500 38600 4
N 44500 38600 44500 38700 4
N 44500 39800 44500 39600 4
C 45100 39600 1 270 0 capacitor-1.sym
{
T 45800 39400 5 10 0 1 270 0 1
device=CAPACITOR
T 45100 39600 5 10 0 1 0 0 1
footprint=0402
T 45400 39400 5 10 1 1 180 6 1
refdes=C59
T 45400 39000 5 10 1 1 180 6 1
value=1u
}
N 45300 39800 45300 39600 4
N 45300 38700 45300 38600 4
N 41700 39400 41400 39400 4
N 41400 39000 41400 39800 4
C 40700 39600 1 270 0 capacitor-1.sym
{
T 41400 39400 5 10 0 1 270 0 1
device=CAPACITOR
T 40700 39600 5 10 0 1 0 0 1
footprint=0402
T 40800 39400 5 10 1 1 180 0 1
refdes=C45
T 40800 39000 5 10 1 1 180 0 1
value=1u
}
N 41700 39000 41400 39000 4
N 40900 39600 40900 39800 4
C 46100 39800 1 0 0 vcc.sym
{
T 46100 41500 5 8 0 0 0 0 1
footprint=none
T 46100 41300 5 8 0 0 0 0 1
symversion=1.0
T 46100 39800 5 10 0 1 0 0 1
net=5V:1
T 46300 39800 5 10 1 1 0 0 1
value=5V
}
C 45200 38400 1 0 0 agnd.sym
C 40800 38300 1 0 0 agnd.sym
C 45200 39800 1 0 0 testpt-1.sym
{
T 45600 40700 5 10 0 1 0 0 1
device=TESTPOINT
T 45600 40500 5 10 0 1 0 0 1
footprint=JUMPER1
T 45200 39800 5 10 0 1 0 0 1
value=PLS
T 45300 40200 5 10 1 1 0 0 1
refdes=TP3
}
N 31500 53000 31500 54100 4
C 63200 41000 1 0 0 led-2.sym
{
T 63300 41600 5 10 0 1 0 0 1
device=LED
T 63200 41000 5 10 0 1 90 0 1
footprint=0603
T 63200 41000 5 10 0 1 0 6 1
value=BLHGK36G
T 63800 40900 5 10 1 1 180 8 1
refdes=D4
}
C 62000 41200 1 180 1 resistor-2.sym
{
T 62400 40850 5 10 0 1 180 6 1
device=RESISTOR
T 62000 41200 5 10 0 1 90 2 1
footprint=0603
T 62500 41000 5 10 1 1 180 6 1
refdes=R45
T 62100 41000 5 10 1 1 180 6 1
value=3.3k
}
N 62900 41100 63200 41100 4
N 61700 41100 62000 41100 4
C 61600 41100 1 0 0 vcc.sym
{
T 61600 42800 5 8 0 0 0 0 1
footprint=none
T 61600 42600 5 8 0 0 0 0 1
symversion=1.0
T 61600 41100 5 10 0 0 0 0 1
net=3V3:1
T 61600 41100 5 10 1 1 0 6 1
value=3V3
}
N 64400 41100 64100 41100 4
C 64600 41000 1 90 0 agnd.sym
C 66500 39600 1 180 1 input-1.sym
{
T 66500 39300 5 10 0 0 180 6 1
device=INPUT
T 66500 39600 5 10 0 0 180 6 1
net=IN0:1
T 66400 39400 5 10 1 1 0 6 1
value=IN0
}
N 67300 39500 67600 39500 4
C 66500 39200 1 180 1 input-1.sym
{
T 66500 38900 5 10 0 0 180 6 1
device=INPUT
T 66500 39200 5 10 0 0 180 6 1
net=IN1:1
T 66400 39000 5 10 1 1 0 6 1
value=IN1
}
N 67300 39100 67600 39100 4
C 66500 38800 1 180 1 input-1.sym
{
T 66500 38500 5 10 0 0 180 6 1
device=INPUT
T 66500 38800 5 10 0 0 180 6 1
net=IN2:1
T 66400 38600 5 10 1 1 0 6 1
value=IN2
}
N 67300 38700 67600 38700 4
C 66500 38400 1 180 1 input-1.sym
{
T 66500 38100 5 10 0 0 180 6 1
device=INPUT
T 66500 38400 5 10 0 0 180 6 1
net=IN3:1
T 66400 38200 5 10 1 1 0 6 1
value=IN3
}
N 67300 38300 67600 38300 4
C 66500 38000 1 180 1 input-1.sym
{
T 66500 37700 5 10 0 0 180 6 1
device=INPUT
T 66500 38000 5 10 0 0 180 6 1
net=IN4:1
T 66400 37800 5 10 1 1 0 6 1
value=IN4
}
N 67300 37900 67600 37900 4
C 66500 37600 1 180 1 input-1.sym
{
T 66500 37300 5 10 0 0 180 6 1
device=INPUT
T 66500 37600 5 10 0 0 180 6 1
net=IN5:1
T 66400 37400 5 10 1 1 0 6 1
value=IN5
}
N 67300 37500 67600 37500 4
C 66500 37200 1 180 1 input-1.sym
{
T 66500 36900 5 10 0 0 180 6 1
device=INPUT
T 66500 37200 5 10 0 0 180 6 1
net=IN6:1
T 66400 37000 5 10 1 1 0 6 1
value=IN6
}
N 67300 37100 67600 37100 4
C 66500 36800 1 180 1 input-1.sym
{
T 66500 36500 5 10 0 0 180 6 1
device=INPUT
T 66500 36800 5 10 0 0 180 6 1
net=IN7:1
T 66400 36600 5 10 1 1 0 6 1
value=IN7
}
N 67300 36700 67600 36700 4
C 58200 30600 1 180 1 resistor-2.sym
{
T 58600 30250 5 10 0 1 180 6 1
device=RESISTOR
T 58200 30600 5 10 0 1 90 2 1
footprint=0402
T 58600 30700 5 10 1 1 0 6 1
refdes=R57
T 58700 30700 5 10 1 1 0 0 1
value=5.1k/1%
}
N 58000 30500 58200 30500 4
N 59100 30500 59500 30500 4
C 58200 31300 1 180 1 resistor-2.sym
{
T 58600 30950 5 10 0 1 180 6 1
device=RESISTOR
T 58200 31300 5 10 0 1 90 2 1
footprint=0402
T 58600 31400 5 10 1 1 0 6 1
refdes=R55
T 58700 31400 5 10 1 1 0 0 1
value=5.1k/1%
}
C 57800 31300 1 270 0 agnd.sym
N 58000 31200 58200 31200 4
N 59300 30500 59300 31200 4
N 59300 31200 59100 31200 4
C 54700 30600 1 180 1 resistor-2.sym
{
T 55100 30250 5 10 0 1 180 6 1
device=RESISTOR
T 54700 30600 5 10 0 1 90 2 1
footprint=0402
T 55100 30700 5 10 1 1 0 6 1
refdes=R51
T 55200 30700 5 10 1 1 0 0 1
value=5.1k/1%
}
N 54500 30500 54700 30500 4
N 55600 30500 56000 30500 4
C 70500 30600 1 180 1 resistor-2.sym
{
T 70900 30250 5 10 0 1 180 6 1
device=RESISTOR
T 70500 30600 5 10 0 1 90 2 1
footprint=0402
T 70900 30700 5 10 1 1 0 6 1
refdes=R65
T 71000 30700 5 10 1 1 0 0 1
value=5.1k/1%
}
C 70400 30500 1 0 1 vcc.sym
{
T 70400 32200 5 8 0 0 0 6 1
footprint=none
T 70400 32000 5 8 0 0 0 6 1
symversion=1.0
T 70400 30500 5 10 0 1 0 6 1
net=5V_2:1
T 70200 30600 5 10 1 1 0 6 1
value=5V_2
}
N 70300 30500 70500 30500 4
N 71400 30500 71800 30500 4
C 70500 31200 1 180 1 resistor-2.sym
{
T 70900 30850 5 10 0 1 180 6 1
device=RESISTOR
T 70500 31200 5 10 0 1 90 2 1
footprint=0402
T 70900 31300 5 10 1 1 0 6 1
refdes=R64
T 71000 31300 5 10 1 1 0 0 1
value=5.1k/1%
}
C 70100 31200 1 270 0 agnd.sym
N 70300 31100 70500 31100 4
N 71600 30500 71600 31100 4
N 71600 31100 71400 31100 4
C 42900 30600 1 180 1 resistor-2.sym
{
T 43300 30250 5 10 0 1 180 6 1
device=RESISTOR
T 42900 30600 5 10 0 1 90 2 1
footprint=0402
T 43300 30700 5 10 1 1 0 6 1
refdes=R29
T 43400 30700 5 10 1 1 0 0 1
value=5.1k/1%
}
C 42800 30500 1 0 1 vcc.sym
{
T 42800 32200 5 8 0 0 0 6 1
footprint=none
T 42800 32000 5 8 0 0 0 6 1
symversion=1.0
T 42800 30500 5 10 0 1 0 6 1
net=3V3:1
T 42600 30600 5 10 1 1 0 6 1
value=3V3
}
N 42700 30500 42900 30500 4
N 43800 30500 44200 30500 4
C 62800 30600 1 180 1 resistor-2.sym
{
T 63200 30250 5 10 0 1 180 6 1
device=RESISTOR
T 62800 30600 5 10 0 1 90 2 1
footprint=0603
T 63200 30700 5 10 1 1 0 6 1
refdes=R59
T 63300 30700 5 10 1 1 0 0 1
value=100
}
N 62600 30500 62800 30500 4
N 63700 30500 64100 30500 4
C 66500 30600 1 180 1 resistor-2.sym
{
T 66900 30250 5 10 0 1 180 6 1
device=RESISTOR
T 66500 30600 5 10 0 1 90 2 1
footprint=0402
T 66900 30700 5 10 1 1 0 6 1
refdes=R63
T 67000 30700 5 10 1 1 0 0 1
value=5.1k/1%
}
C 66400 30500 1 0 1 vcc.sym
{
T 66400 32200 5 8 0 0 0 6 1
footprint=none
T 66400 32000 5 8 0 0 0 6 1
symversion=1.0
T 66400 30500 5 10 0 1 0 6 1
net=3V3_3:1
T 66200 30600 5 10 1 1 0 6 1
value=3V3_3
}
N 66300 30500 66500 30500 4
N 67400 30500 67800 30500 4
C 51200 30600 1 180 1 resistor-2.sym
{
T 51600 30250 5 10 0 1 180 6 1
device=RESISTOR
T 51200 30600 5 10 0 1 90 2 1
footprint=0603
T 51600 30700 5 10 1 1 0 6 1
refdes=R43
T 51700 30700 5 10 1 1 0 0 1
value=9.1k/1%
}
C 51100 30500 1 0 1 vcc.sym
{
T 51100 32200 5 8 0 0 0 6 1
footprint=none
T 51100 32000 5 8 0 0 0 6 1
symversion=1.0
T 51100 30500 5 10 0 1 0 6 1
net=14V:1
T 50900 30600 5 10 1 1 0 6 1
value=14V
}
N 51000 30500 51200 30500 4
N 52100 30500 52500 30500 4
C 51200 31200 1 180 1 resistor-2.sym
{
T 51600 30850 5 10 0 1 180 6 1
device=RESISTOR
T 51200 31200 5 10 0 1 90 2 1
footprint=0603
T 51600 31300 5 10 1 1 0 6 1
refdes=R42
T 51700 31300 5 10 1 1 0 0 1
value=1.2k/1%
}
C 50800 31200 1 270 0 agnd.sym
N 51000 31100 51200 31100 4
N 52300 30500 52300 31100 4
N 52300 31100 52100 31100 4
C 46500 30600 1 180 1 input-1.sym
{
T 46500 30300 5 10 0 0 180 6 1
device=INPUT
T 46500 30600 5 10 0 0 180 6 1
net=VCM1:1
T 46400 30400 5 10 1 1 0 6 1
value=VCM1
}
C 65900 52400 1 0 0 output-1.sym
{
T 66000 52700 5 10 0 0 0 0 1
device=OUTPUT
T 65900 52400 5 10 0 0 0 0 1
net=VCM1:1
T 66800 52400 5 10 1 1 0 0 1
value=VCM1
}
N 65900 52500 65400 52500 4
N 65400 52500 65400 52100 4
C 28900 51500 1 0 0 agnd.sym
C 63200 40400 1 0 0 led-2.sym
{
T 63300 41000 5 10 0 1 0 0 1
device=LED
T 63200 40400 5 10 0 1 90 0 1
footprint=0603
T 63200 40400 5 10 0 1 0 6 1
value=BLHKB36A
T 63800 40300 5 10 1 1 180 8 1
refdes=D5
}
C 62000 40600 1 180 1 resistor-2.sym
{
T 62400 40250 5 10 0 1 180 6 1
device=RESISTOR
T 62000 40600 5 10 0 1 90 2 1
footprint=0603
T 62500 40400 5 10 1 1 180 6 1
refdes=R46
T 62100 40400 5 10 1 1 180 6 1
value=3.3k
}
N 62900 40500 63200 40500 4
N 61700 40500 62000 40500 4
N 64400 40500 64100 40500 4
C 64600 40400 1 90 0 agnd.sym
C 60900 40600 1 180 1 input-1.sym
{
T 60900 40300 5 10 0 0 180 6 1
device=INPUT
T 60900 40600 5 10 0 0 180 6 1
net=MUXOUT:1
T 61700 40700 5 10 1 1 0 6 1
value=MUXOUT
}
C 53500 54300 1 180 0 capacitor-1.sym
{
T 53300 53600 5 10 0 1 180 0 1
device=CAPACITOR
T 53500 54300 5 10 0 1 90 0 1
footprint=0402
T 52900 54200 5 10 1 1 0 6 1
refdes=C37
T 53200 54200 5 10 1 1 0 0 1
value=100p
}
N 51700 54100 52600 54100 4
N 53500 54100 56700 54100 4
C 73700 55500 1 0 0 agnd.sym
C 73700 54700 1 0 0 agnd.sym
C 73700 53900 1 0 0 agnd.sym
C 73700 53100 1 0 0 agnd.sym
C 73700 52300 1 0 0 agnd.sym
C 71600 55300 1 0 0 agnd.sym
C 66900 55300 1 0 0 agnd.sym
C 63300 57000 1 0 0 agnd.sym
C 48600 57000 1 0 0 agnd.sym
C 69900 48100 1 0 0 agnd.sym
C 62200 44300 1 0 0 agnd.sym
C 26700 52600 1 0 0 agnd.sym
N 53300 47500 54200 47500 4
N 64400 47300 64900 47300 4
C 49100 39600 1 0 0 agnd.sym
C 53900 39800 1 0 0 agnd.sym
C 49000 54900 1 180 1 GP2S+.sym
{
T 51400 52800 5 10 1 1 180 0 1
refdes=U8
T 50200 53500 5 10 0 1 180 6 1
device=GP2S+
T 50200 53300 5 10 0 1 180 6 1
footprint=QFN12_3_EP
T 49000 54900 5 10 0 1 0 0 1
value=GP2S+
}
C 48400 42600 1 0 0 output-1.sym
{
T 48500 42900 5 10 0 0 0 0 1
device=OUTPUT
T 48400 42600 5 10 0 0 0 0 1
net=REFIN:1
T 49300 42600 5 10 1 1 0 0 1
value=REFIN
}
N 48400 42700 48200 42700 4
C 56300 53400 1 180 0 capacitor-1.sym
{
T 56100 52700 5 10 0 1 180 0 1
device=CAPACITOR
T 56300 53400 5 10 0 1 90 0 1
footprint=0402
T 55700 53300 5 10 1 1 0 6 1
refdes=C48
T 56000 53300 5 10 1 1 0 0 1
value=100n
}
N 56300 52700 56500 52700 4
N 56500 52700 56500 52900 4
N 56500 53700 56500 53200 4
N 56500 53200 56300 53200 4
C 54900 53300 1 270 0 agnd.sym
N 55100 53200 55400 53200 4
C 53600 53200 1 270 1 capacitor-1.sym
{
T 54300 53400 5 10 0 1 90 2 1
device=CAPACITOR
T 53600 53200 5 10 0 1 0 6 1
footprint=0603
T 53800 53800 5 10 1 1 0 0 1
refdes=C40
T 53800 53500 5 10 1 1 180 6 1
value=DNI
}
C 53700 53000 1 0 0 agnd.sym
C 47500 30600 1 180 1 resistor-2.sym
{
T 47900 30250 5 10 0 1 180 6 1
device=RESISTOR
T 47500 30600 5 10 0 1 90 2 1
footprint=0603
T 47900 30700 5 10 1 1 0 6 1
refdes=R34
T 48000 30700 5 10 1 1 0 0 1
value=100
}
N 47500 30500 47300 30500 4
N 48800 30500 48400 30500 4
C 44200 30400 1 0 0 output-1.sym
{
T 44300 30700 5 10 0 0 0 0 1
device=OUTPUT
T 44200 30400 5 10 0 0 0 0 1
net=IN0:1
T 45100 30400 5 10 1 1 0 0 1
value=IN0
}
C 71800 30400 1 0 0 output-1.sym
{
T 71900 30700 5 10 0 0 0 0 1
device=OUTPUT
T 71800 30400 5 10 0 0 0 0 1
net=IN7:1
T 72700 30400 5 10 1 1 0 0 1
value=IN7
}
C 59500 30400 1 0 0 output-1.sym
{
T 59600 30700 5 10 0 0 0 0 1
device=OUTPUT
T 59500 30400 5 10 0 0 0 0 1
net=IN4:1
T 60400 30400 5 10 1 1 0 0 1
value=IN4
}
C 56000 30400 1 0 0 output-1.sym
{
T 56100 30700 5 10 0 0 0 0 1
device=OUTPUT
T 56000 30400 5 10 0 0 0 0 1
net=IN3:1
T 56900 30400 5 10 1 1 0 0 1
value=IN3
}
C 67800 30400 1 0 0 output-1.sym
{
T 67900 30700 5 10 0 0 0 0 1
device=OUTPUT
T 67800 30400 5 10 0 0 0 0 1
net=IN6:1
T 68700 30400 5 10 1 1 0 0 1
value=IN6
}
C 64100 30400 1 0 0 output-1.sym
{
T 64200 30700 5 10 0 0 0 0 1
device=OUTPUT
T 64100 30400 5 10 0 0 0 0 1
net=IN5:1
T 65000 30400 5 10 1 1 0 0 1
value=IN5
}
N 71400 35900 71200 35900 4
N 71400 36700 71200 36700 4
N 72300 38300 73500 38300 4
C 72300 38400 1 180 0 resistor-2.sym
{
T 71900 38050 5 10 0 1 180 0 1
device=RESISTOR
T 71800 38200 5 10 1 1 180 0 1
refdes=R60
T 71900 38200 5 10 1 1 180 6 1
value=8.2k
T 72300 38400 5 10 0 1 0 0 1
footprint=0603
}
N 71400 33100 71200 33100 4
C 71300 38700 1 0 0 testpt-1.sym
{
T 71700 39600 5 10 0 1 0 0 1
device=TESTPOINT
T 71700 39400 5 10 0 1 0 0 1
footprint=JUMPER1
T 71500 38700 5 10 1 1 0 0 1
refdes=TP12
T 71300 38700 5 10 0 1 0 0 1
value=PLS
}
N 71400 33500 71200 33500 4
N 71400 33900 71200 33900 4
C 58600 41200 1 0 0 led-2.sym
{
T 58700 41800 5 10 0 1 0 0 1
device=LED
T 58600 41200 5 10 0 1 90 0 1
footprint=0603
T 58600 41200 5 10 0 1 0 6 1
value=BLHKB36A
T 59200 41100 5 10 1 1 180 8 1
refdes=D1
}
C 57400 41400 1 180 1 resistor-2.sym
{
T 57800 41050 5 10 0 1 180 6 1
device=RESISTOR
T 57400 41400 5 10 0 1 90 2 1
footprint=0603
T 57900 41200 5 10 1 1 180 6 1
refdes=R33
T 57500 41200 5 10 1 1 180 6 1
value=3.3k
}
N 58300 41300 58600 41300 4
N 57100 41300 57400 41300 4
N 59800 41300 59500 41300 4
C 60000 41200 1 90 0 agnd.sym
C 56300 41400 1 180 1 input-1.sym
{
T 56300 41100 5 10 0 0 180 6 1
device=INPUT
T 56300 41400 5 10 0 0 180 6 1
net=LED0:1
T 56200 41200 5 10 1 1 0 6 1
value=LED0
}
C 58600 40400 1 0 0 led-2.sym
{
T 58700 41000 5 10 0 1 0 0 1
device=LED
T 58600 40400 5 10 0 1 90 0 1
footprint=0603
T 58600 40400 5 10 0 1 0 6 1
value=BLHKB36A
T 59200 40300 5 10 1 1 180 8 1
refdes=D2
}
C 57400 40600 1 180 1 resistor-2.sym
{
T 57800 40250 5 10 0 1 180 6 1
device=RESISTOR
T 57400 40600 5 10 0 1 90 2 1
footprint=0603
T 57900 40400 5 10 1 1 180 6 1
refdes=R35
T 57500 40400 5 10 1 1 180 6 1
value=3.3k
}
N 58300 40500 58600 40500 4
N 57100 40500 57400 40500 4
N 59800 40500 59500 40500 4
C 60000 40400 1 90 0 agnd.sym
C 56300 40600 1 180 1 input-1.sym
{
T 56300 40300 5 10 0 0 180 6 1
device=INPUT
T 56300 40600 5 10 0 0 180 6 1
net=LED1:1
T 56200 40400 5 10 1 1 0 6 1
value=LED1
}
C 71400 33000 1 0 0 output-1.sym
{
T 71500 33300 5 10 0 0 0 0 1
device=OUTPUT
T 71400 33000 5 10 0 0 0 0 1
net=LED0:1
T 72300 33000 5 10 1 1 0 0 1
value=LED0
}
C 71400 33400 1 0 0 output-1.sym
{
T 71500 33700 5 10 0 0 0 0 1
device=OUTPUT
T 71400 33400 5 10 0 0 0 0 1
net=LED1:1
T 72300 33400 5 10 1 1 0 0 1
value=LED1
}
C 58600 39700 1 0 0 led-2.sym
{
T 58700 40300 5 10 0 1 0 0 1
device=LED
T 58600 39700 5 10 0 1 90 0 1
footprint=0603
T 58600 39700 5 10 0 1 0 6 1
value=BLHKB36A
T 59200 39600 5 10 1 1 180 8 1
refdes=D3
}
C 57400 39900 1 180 1 resistor-2.sym
{
T 57800 39550 5 10 0 1 180 6 1
device=RESISTOR
T 57400 39900 5 10 0 1 90 2 1
footprint=0603
T 57900 39700 5 10 1 1 180 6 1
refdes=R37
T 57500 39700 5 10 1 1 180 6 1
value=3.3k
}
N 58300 39800 58600 39800 4
N 57100 39800 57400 39800 4
N 59800 39800 59500 39800 4
C 60000 39700 1 90 0 agnd.sym
C 56300 39900 1 180 1 input-1.sym
{
T 56300 39600 5 10 0 0 180 6 1
device=INPUT
T 56300 39900 5 10 0 0 180 6 1
net=LED2:1
T 56200 39700 5 10 1 1 0 6 1
value=LED2
}
C 34800 43100 1 0 0 3314J1.sym
{
T 35100 43700 5 10 1 1 0 0 1
refdes=VR1
T 35100 44300 5 10 0 1 0 0 1
device=POTENTIOMETER
T 35100 44000 5 10 0 1 0 0 1
value=3314J-1-503E
T 35800 43714 5 10 0 1 0 0 1
footprint=3314J1
}
C 35600 36600 1 0 0 BNX016.sym
{
T 37400 38300 5 10 1 1 0 6 1
refdes=A1
T 36000 38500 5 10 0 1 0 0 1
device=FILTER
T 36000 38700 5 10 0 1 0 0 1
footprint=BNX016
T 35600 36600 5 10 0 1 0 0 1
value=BNX016
}
C 47000 48500 1 0 0 BMIS107.sym
{
T 48800 49100 5 10 1 1 0 6 1
refdes=B1
T 47400 49300 5 10 0 1 0 0 1
device=SHIELD
T 47400 49500 5 10 0 1 0 0 1
footprint=BMIS107
T 47000 48500 5 10 0 1 0 0 1
value=BMIS107
}
C 27900 51800 1 0 0 ABA54563.sym
{
T 29700 53500 5 10 1 1 0 6 1
refdes=U3
T 28800 53000 5 10 0 1 0 0 1
device=ABA54563
T 28800 53200 5 10 0 1 0 0 1
footprint=SC70_6
T 27900 51800 5 10 0 1 0 0 1
value=ABA-54563-BLKG
}
C 41600 31800 1 0 0 TPS61080.sym
{
T 43400 34300 5 10 1 1 0 6 1
refdes=U13
T 42000 34500 5 10 0 1 0 0 1
device=TPS61080
T 42000 34700 5 10 0 1 0 0 1
footprint=QFN10_3_EP
T 41600 31800 5 10 0 1 0 0 1
value=TPS61080DRC
}
C 31000 56800 1 0 0 AD8666_1.sym
{
T 31700 58100 5 10 0 1 0 0 1
device=AD8666
T 31700 57500 5 10 1 1 0 0 1
refdes=U1
T 31695 57695 5 10 0 1 0 0 1
footprint=SO8
T 31695 57895 5 10 0 1 0 0 1
value=AD8666ARZ
}
C 31000 55100 1 0 0 AD8666_2.sym
{
T 31700 55900 5 10 0 1 0 0 1
device=AD8666
T 31700 55800 5 10 1 1 0 0 1
refdes=U1
T 31695 56695 5 10 0 1 0 0 1
footprint=SO8
T 31000 55100 5 10 0 1 0 0 1
value=AD8666ARZ
}
C 44200 52900 1 0 0 ADL5602.sym
{
T 46000 54200 5 10 1 1 0 6 1
refdes=U6
T 44600 54400 5 10 0 1 0 0 1
device=ADL5602
T 44600 54600 5 10 0 1 0 0 1
footprint=SOT89
T 44200 52900 5 10 0 1 0 0 1
value=ADL5602ARKZ
}
C 41600 35500 1 0 0 ADP7104.sym
{
T 43400 37600 5 10 1 1 0 6 1
refdes=U11
T 42000 37800 5 10 0 1 0 0 1
device=ADP7104
T 42000 38000 5 10 0 1 0 0 1
footprint=LFCSP_WD8_3_EP
T 41600 35500 5 10 0 1 0 0 1
value=ADP7104ACPZ
}
C 49900 34800 1 0 0 ADP7104.sym
{
T 51700 36900 5 10 1 1 0 6 1
refdes=U16
T 50300 37100 5 10 0 1 0 0 1
device=ADP7104
T 50300 37300 5 10 0 1 0 0 1
footprint=LFCSP_WD8_3_EP
T 49900 34800 5 10 0 1 0 0 1
value=ADP7104ACPZ-5.0
}
C 49900 32200 1 0 0 ADP7104.sym
{
T 51700 34300 5 10 1 1 0 6 1
refdes=U19
T 50300 34500 5 10 0 1 0 0 1
device=ADP7104
T 50300 34700 5 10 0 1 0 0 1
footprint=LFCSP_WD8_3_EP
T 49900 32200 5 10 0 1 0 0 1
value=ADP7104ACPZ
}
C 67600 48500 1 0 0 ADRF6516.sym
{
T 72000 55000 5 10 1 1 0 6 1
refdes=U18
T 69800 52100 5 10 0 1 0 0 1
device=ADRF6516
T 69800 52300 5 10 0 1 0 0 1
footprint=QFN32_5_EP
T 67600 48500 5 10 0 1 0 0 1
value=ADRF6516ACPZ
}
C 56600 47300 1 0 0 ADRF6820.sym
{
T 61000 55000 5 10 1 1 0 6 1
refdes=U12
T 58800 51500 5 10 0 1 0 0 1
device=ADRF6820
T 58800 51700 5 10 0 1 0 0 1
footprint=QFN40_6_EP
T 56600 47300 5 10 0 1 0 0 1
value=ADRF6820ACPZ
}
C 31700 47700 1 0 0 HMC890.sym
{
T 35300 54600 5 10 1 1 0 6 1
refdes=U4
T 33500 51500 5 10 0 1 0 0 1
device=HMC890
T 33500 51700 5 10 0 1 0 0 1
footprint=HITTITE_32_5_EP
T 31700 47700 5 10 0 1 0 0 1
value=HMC890LP5E
}
C 38000 47700 1 0 0 HMC625.sym
{
T 41600 54600 5 10 1 1 0 6 1
refdes=U5
T 39800 51500 5 10 0 1 0 0 1
device=HMC625
T 39800 51700 5 10 0 1 0 0 1
footprint=HITTITE_32_5_EP
T 38000 47700 5 10 0 1 0 0 1
value=HMC625LP5E
}
C 49900 39700 1 0 0 ADP3330.sym
{
T 51700 41500 5 10 1 1 0 6 1
refdes=U14
T 50300 41700 5 10 0 1 0 0 1
device=ADP3330
T 50300 41900 5 10 0 1 0 0 1
footprint=SOT26
T 49900 39700 5 10 0 1 0 0 1
value=ADP3330ARTZ-3.3
}
C 41600 38100 1 0 0 ADP3335.sym
{
T 43400 40300 5 10 1 1 0 6 1
refdes=U10
T 42000 40500 5 10 0 1 0 0 1
device=ADP3335
T 42000 40700 5 10 0 1 0 0 1
footprint=MSOP8
T 41600 38100 5 10 0 1 0 0 1
value=ADP3335ARMZ-5.0
}
C 49900 37200 1 0 0 ADP3335.sym
{
T 51700 39400 5 10 1 1 0 6 1
refdes=U15
T 50300 39600 5 10 0 1 0 0 1
device=ADP3335
T 50300 39800 5 10 0 1 0 0 1
footprint=MSOP8
T 49900 37200 5 10 0 1 0 0 1
value=ADP3335ARMZ-3.3
}
C 67500 42300 1 0 0 NC7WZ07.sym
{
T 69300 44000 5 10 1 1 0 6 1
refdes=U21
T 68400 43500 5 10 0 1 0 0 1
device=NC7WZ07
T 68400 43700 5 10 0 1 0 0 1
footprint=SC70_6
T 67500 42300 5 10 0 1 0 0 1
value=NC7WZ07P6X
}
C 60300 39300 1 180 1 NFA31G.sym
{
T 62100 36800 5 10 1 1 180 0 1
refdes=U22
T 60700 36600 5 10 0 1 180 6 1
device=FILTER
T 60700 36400 5 10 0 1 180 6 1
footprint=NFA31G
T 60300 39300 5 10 0 1 0 0 1
value=NFA31GD1011014D
}
C 60300 35500 1 180 1 NFA31G.sym
{
T 62100 33000 5 10 1 1 180 0 1
refdes=U23
T 60700 32800 5 10 0 1 180 6 1
device=FILTER
T 60700 32600 5 10 0 1 180 6 1
footprint=NFA31G
T 60300 35500 5 10 0 1 0 0 1
value=NFA31GD1011014D
}
C 37000 42300 1 0 0 NT3225SA.sym
{
T 38800 44000 5 10 1 1 0 6 1
refdes=U7
T 37900 43500 5 10 0 1 0 0 1
device=XTAL
T 37900 43700 5 10 0 1 0 0 1
footprint=NT3225SA
T 37000 42300 5 10 0 1 0 0 1
value=24M
}
C 63400 47900 1 180 1 TM1-6.sym
{
T 63900 47300 5 10 1 1 0 2 1
refdes=T1
T 63600 46800 5 10 0 1 180 6 1
device=TRANSFORMER
T 63595 47000 5 10 0 1 180 6 1
footprint=TM1-6
T 63400 47900 5 10 0 1 180 6 1
value=TM1-6
}
C 26700 52800 1 0 0 IPX.sym
{
T 26675 53125 5 10 1 1 0 0 1
refdes=J1
T 26691 53295 5 10 0 0 0 0 1
footprint=IPX
T 26691 53495 5 10 0 0 0 0 1
device=CONNECTOR
T 26700 52800 5 10 0 0 0 0 1
value=IPX
}
C 54700 53500 1 0 0 IPX.sym
{
T 54675 53825 5 10 1 1 0 0 1
refdes=J4
T 54691 53995 5 10 0 0 0 0 1
footprint=IPX
T 54691 54195 5 10 0 0 0 0 1
device=CONNECTOR
T 54700 53500 5 10 0 0 0 0 1
value=IPX
}
C 40600 45200 1 0 0 IPX.sym
{
T 40575 45525 5 10 1 1 0 0 1
refdes=J2
T 40591 45695 5 10 0 0 0 0 1
footprint=IPX
T 40591 45895 5 10 0 0 0 0 1
device=CONNECTOR
T 40600 45200 5 10 0 0 0 0 1
value=IPX
}
C 73900 55800 1 0 1 IPX.sym
{
T 73925 56125 5 10 1 1 0 6 1
refdes=J6
T 73909 56295 5 10 0 0 0 6 1
footprint=IPX
T 73909 56495 5 10 0 0 0 6 1
device=CONNECTOR
T 73900 55800 5 10 0 0 0 0 1
value=IPX
}
C 73900 54900 1 0 1 IPX.sym
{
T 73925 55225 5 10 1 1 0 6 1
refdes=J8
T 73909 55395 5 10 0 0 0 6 1
footprint=IPX
T 73909 55595 5 10 0 0 0 6 1
device=CONNECTOR
T 73900 54900 5 10 0 0 0 0 1
value=IPX
}
C 73900 54100 1 0 1 IPX.sym
{
T 73925 54425 5 10 1 1 0 6 1
refdes=J9
T 73909 54595 5 10 0 0 0 6 1
footprint=IPX
T 73909 54795 5 10 0 0 0 6 1
device=CONNECTOR
T 73900 54100 5 10 0 0 0 0 1
value=IPX
}
C 73900 53300 1 0 1 IPX.sym
{
T 73925 53625 5 10 1 1 0 6 1
refdes=J10
T 73909 53795 5 10 0 0 0 6 1
footprint=IPX
T 73909 53995 5 10 0 0 0 6 1
device=CONNECTOR
T 73900 53300 5 10 0 0 0 0 1
value=IPX
}
C 73900 52500 1 0 1 IPX.sym
{
T 73925 52825 5 10 1 1 0 6 1
refdes=J11
T 73909 52995 5 10 0 0 0 6 1
footprint=IPX
T 73909 53195 5 10 0 0 0 6 1
device=CONNECTOR
T 73900 52500 5 10 0 0 0 0 1
value=IPX
}
C 62400 44500 1 0 1 IPX.sym
{
T 62425 44825 5 10 1 1 0 6 1
refdes=J5
T 62409 44995 5 10 0 0 0 6 1
footprint=IPX
T 62409 45195 5 10 0 0 0 6 1
device=CONNECTOR
T 62400 44500 5 10 0 0 0 0 1
value=IPX
}
C 63000 38400 1 0 0 output-1.sym
{
T 63100 38700 5 10 0 0 0 0 1
device=OUTPUT
T 63000 38400 5 10 0 0 0 0 1
net=SPI_CS0:1
T 63900 38400 5 10 1 1 0 0 1
value=SPI_CS0
}
C 63000 38000 1 0 0 output-1.sym
{
T 63100 38300 5 10 0 0 0 0 1
device=OUTPUT
T 63000 38000 5 10 0 0 0 0 1
net=SPI_CS1:1
T 63900 38000 5 10 1 1 0 0 1
value=SPI_CS1
}
N 63000 37300 62400 37300 4
N 58700 35100 58700 37700 4
N 58300 35500 58300 37300 4
N 57900 35900 57900 38500 4
N 57500 36300 57500 38100 4
C 64400 35200 1 180 1 input-1.sym
{
T 64400 34900 5 10 0 0 180 6 1
device=INPUT
T 64400 35200 5 10 0 0 180 6 1
net=SPI_CS4:1
T 65000 35300 5 10 1 1 0 6 1
value=SPI_CS4
}
C 42400 51600 1 90 0 agnd.sym
N 42200 51700 41900 51700 4
C 38500 58100 1 0 1 vcc.sym
{
T 38500 59800 5 8 0 0 0 6 1
footprint=none
T 38500 59600 5 8 0 0 0 6 1
symversion=1.0
T 38500 58100 5 10 0 1 0 6 1
net=3V3:1
T 38300 58200 5 10 1 1 0 6 1
value=3V3
}
N 40500 57200 39900 57200 4
C 40100 57000 1 0 0 agnd.sym
C 38700 58000 1 0 0 inductor-1.sym
{
T 38800 57900 5 10 1 1 0 0 1
device=BLM15A
T 38900 58300 5 10 1 1 0 0 1
refdes=L2
T 38700 58000 5 10 0 0 0 0 1
value=BLM15AG121SN1D
T 38700 58000 5 10 0 0 0 0 1
footprint=0402
}
C 40700 58100 1 0 0 vcc.sym
{
T 40700 59800 5 8 0 0 0 0 1
footprint=none
T 40700 59600 5 8 0 0 0 0 1
symversion=1.0
T 40700 58100 5 10 0 1 0 0 1
net=DIG_3P3V:1
T 40900 58200 5 10 1 1 0 0 1
value=DIG_3P3V
}
C 42700 58100 1 0 1 vcc.sym
{
T 42700 59800 5 8 0 0 0 6 1
footprint=none
T 42700 59600 5 8 0 0 0 6 1
symversion=1.0
T 42700 58100 5 10 0 1 0 6 1
net=3V3:1
T 42500 58200 5 10 1 1 0 6 1
value=3V3
}
C 42900 58000 1 0 0 inductor-1.sym
{
T 43000 57900 5 10 1 1 0 0 1
device=BLM15A
T 43100 58300 5 10 1 1 0 0 1
refdes=L3
T 42900 58000 5 10 0 0 0 0 1
value=BLM15AG121SN1D
T 42900 58000 5 10 0 0 0 0 1
footprint=0402
}
C 44900 58100 1 0 0 vcc.sym
{
T 44900 59800 5 8 0 0 0 0 1
footprint=none
T 44900 59600 5 8 0 0 0 0 1
symversion=1.0
T 44900 58100 5 10 0 1 0 0 1
net=LO2_3P3V:1
T 45100 58200 5 10 1 1 0 0 1
value=LO2_3P3V
}
N 44700 57200 44100 57200 4
C 44300 57000 1 0 0 agnd.sym
C 47000 58100 1 0 1 vcc.sym
{
T 47000 59800 5 8 0 0 0 6 1
footprint=none
T 47000 59600 5 8 0 0 0 6 1
symversion=1.0
T 47000 58100 5 10 0 1 0 6 1
net=3V3:1
T 46800 58200 5 10 1 1 0 6 1
value=3V3
}
C 47200 58000 1 0 0 inductor-1.sym
{
T 47300 57900 5 10 1 1 0 0 1
device=BLM15A
T 47400 58300 5 10 1 1 0 0 1
refdes=L5
T 47200 58000 5 10 0 0 0 0 1
value=BLM15AG121SN1D
T 47200 58000 5 10 0 0 0 0 1
footprint=0402
}
C 49200 58100 1 0 0 vcc.sym
{
T 49200 59800 5 8 0 0 0 0 1
footprint=none
T 49200 59600 5 8 0 0 0 0 1
symversion=1.0
T 49200 58100 5 10 0 1 0 0 1
net=LO_3P3V:1
T 49400 58200 5 10 1 1 0 0 1
value=LO_3P3V
}
N 49000 57200 48400 57200 4
C 51000 58100 1 0 1 vcc.sym
{
T 51000 59800 5 8 0 0 0 6 1
footprint=none
T 51000 59600 5 8 0 0 0 6 1
symversion=1.0
T 51000 58100 5 10 0 1 0 6 1
net=3V3:1
T 50800 58200 5 10 1 1 0 6 1
value=3V3
}
C 51200 58000 1 0 0 inductor-1.sym
{
T 51300 57900 5 10 1 1 0 0 1
device=BLM15A
T 51400 58300 5 10 1 1 0 0 1
refdes=L7
T 51200 58000 5 10 0 0 0 0 1
value=BLM15AG121SN1D
T 51200 58000 5 10 0 0 0 0 1
footprint=0402
}
N 52400 57200 53600 57200 4
C 52900 57000 1 0 0 agnd.sym
C 54100 58100 1 0 0 vcc.sym
{
T 54100 59800 5 8 0 0 0 0 1
footprint=none
T 54100 59600 5 8 0 0 0 0 1
symversion=1.0
T 54100 58100 5 10 0 1 0 0 1
net=VCO_3P3V:1
T 54300 58200 5 10 1 1 0 0 1
value=VCO_3P3V
}
N 38400 58100 38700 58100 4
N 39600 58100 40800 58100 4
N 43800 58100 45000 58100 4
N 42900 58100 42600 58100 4
N 49300 58100 48100 58100 4
N 46900 58100 47200 58100 4
N 52100 58100 54200 58100 4
N 51200 58100 50900 58100 4
C 59000 58100 1 0 0 vcc.sym
{
T 59000 59800 5 8 0 0 0 0 1
footprint=none
T 59000 59600 5 8 0 0 0 0 1
symversion=1.0
T 59000 58100 5 10 0 1 0 0 1
net=PLL_3P3V:1
T 59200 58200 5 10 1 1 0 0 1
value=PLL_3P3V
}
C 58100 57000 1 0 0 agnd.sym
N 57600 57200 58800 57200 4
C 56300 58000 1 0 0 inductor-1.sym
{
T 56400 57900 5 10 1 1 0 0 1
device=BLM15A
T 56500 58300 5 10 1 1 0 0 1
refdes=L8
T 56300 58000 5 10 0 0 0 0 1
value=BLM15AG121SN1D
T 56300 58000 5 10 0 0 0 0 1
footprint=0402
}
N 57200 58100 59100 58100 4
C 56100 58100 1 0 1 vcc.sym
{
T 56100 59800 5 8 0 0 0 6 1
footprint=none
T 56100 59600 5 8 0 0 0 6 1
symversion=1.0
T 56100 58100 5 10 0 1 0 6 1
net=3V3:1
T 55900 58200 5 10 1 1 0 6 1
value=3V3
}
N 56000 58100 56300 58100 4
N 63700 57200 63100 57200 4
C 61900 58000 1 0 0 inductor-1.sym
{
T 62000 57900 5 10 1 1 0 0 1
device=BLM15A
T 62100 58300 5 10 1 1 0 0 1
refdes=L9
T 61900 58000 5 10 0 0 0 0 1
value=BLM15AG121SN1D
T 61900 58000 5 10 0 0 0 0 1
footprint=0402
}
C 61700 58100 1 0 1 vcc.sym
{
T 61700 59800 5 8 0 0 0 6 1
footprint=none
T 61700 59600 5 8 0 0 0 6 1
symversion=1.0
T 61700 58100 5 10 0 1 0 6 1
net=5V_2:1
T 61500 58200 5 10 1 1 0 6 1
value=5V_2
}
C 63900 58100 1 0 0 vcc.sym
{
T 63900 59800 5 8 0 0 0 0 1
footprint=none
T 63900 59600 5 8 0 0 0 0 1
symversion=1.0
T 63900 58100 5 10 0 1 0 0 1
net=VPMX_+5V:1
T 64100 58200 5 10 1 1 0 0 1
value=VPMX_+5V
}
N 64000 58100 62800 58100 4
N 61600 58100 61900 58100 4
C 66300 58000 1 0 0 inductor-1.sym
{
T 66400 57900 5 10 1 1 0 0 1
device=BLM15A
T 66500 58300 5 10 1 1 0 0 1
refdes=L10
T 66300 58000 5 10 0 0 0 0 1
value=BLM15AG121SN1D
T 66300 58000 5 10 0 0 0 0 1
footprint=0402
}
C 66100 58100 1 0 1 vcc.sym
{
T 66100 59800 5 8 0 0 0 6 1
footprint=none
T 66100 59600 5 8 0 0 0 6 1
symversion=1.0
T 66100 58100 5 10 0 1 0 6 1
net=5V_2:1
T 65900 58200 5 10 1 1 0 6 1
value=5V_2
}
N 67500 57200 68700 57200 4
C 68000 57000 1 0 0 agnd.sym
N 66000 58100 66300 58100 4
N 67200 58100 69400 58100 4
C 69300 58100 1 0 0 vcc.sym
{
T 69300 59800 5 8 0 0 0 0 1
footprint=none
T 69300 59600 5 8 0 0 0 0 1
symversion=1.0
T 69300 58100 5 10 0 1 0 0 1
net=VPRF_+5V:1
T 69500 58200 5 10 1 1 0 0 1
value=VPRF_+5V
}
C 60300 55500 1 0 0 vcc.sym
{
T 60300 57200 5 8 0 0 0 0 1
footprint=none
T 60300 57000 5 8 0 0 0 0 1
symversion=1.0
T 60300 55500 5 10 0 1 0 0 1
net=VPRF_+5V:1
T 60500 55600 5 10 1 1 0 0 1
value=VPRF_+5V
}
C 59900 55900 1 0 0 vcc.sym
{
T 59900 57600 5 8 0 0 0 0 1
footprint=none
T 59900 57400 5 8 0 0 0 0 1
symversion=1.0
T 59900 55900 5 10 0 1 0 0 1
net=VPMX_+5V:1
T 60100 56000 5 10 1 1 0 0 1
value=VPMX_+5V
}
C 58500 56200 1 0 1 vcc.sym
{
T 58500 57900 5 8 0 0 0 6 1
footprint=none
T 58500 57700 5 8 0 0 0 6 1
symversion=1.0
T 58500 56200 5 10 0 1 0 6 1
net=LO_3P3V:1
T 58300 56300 5 10 1 1 0 6 1
value=LO_3P3V
}
C 57700 55500 1 0 1 vcc.sym
{
T 57700 57200 5 8 0 0 0 6 1
footprint=none
T 57700 57000 5 8 0 0 0 6 1
symversion=1.0
T 57700 55500 5 10 0 1 0 6 1
net=DIG_3P3V:1
T 57500 55600 5 10 1 1 0 6 1
value=DIG_3P3V
}
C 58100 55900 1 0 1 vcc.sym
{
T 58100 57600 5 8 0 0 0 6 1
footprint=none
T 58100 57400 5 8 0 0 0 6 1
symversion=1.0
T 58100 55900 5 10 0 1 0 6 1
net=LO2_3P3V:1
T 57900 56000 5 10 1 1 0 6 1
value=LO2_3P3V
}
C 59100 56500 1 0 0 vcc.sym
{
T 59100 58200 5 8 0 0 0 0 1
footprint=none
T 59100 58000 5 8 0 0 0 0 1
symversion=1.0
T 59100 56500 5 10 0 1 0 0 1
net=PLL_3P3V:1
T 59300 56600 5 10 1 1 0 0 1
value=PLL_3P3V
}
C 58900 56500 1 0 1 vcc.sym
{
T 58900 58200 5 8 0 0 0 6 1
footprint=none
T 58900 58000 5 8 0 0 0 6 1
symversion=1.0
T 58900 56500 5 10 0 1 0 6 1
net=VCO_3P3V:1
T 58700 56600 5 10 1 1 0 6 1
value=VCO_3P3V
}
C 52200 57200 1 270 1 capacitor-1.sym
{
T 52900 57400 5 10 0 1 90 2 1
device=CAPACITOR
T 52200 57200 5 10 0 1 0 6 1
footprint=0603
T 52400 57800 5 10 1 1 0 0 1
refdes=C32
T 52400 57500 5 10 1 1 180 6 1
value=10u
}
C 57400 57200 1 270 1 capacitor-1.sym
{
T 58100 57400 5 10 0 1 90 2 1
device=CAPACITOR
T 57400 57200 5 10 0 1 0 6 1
footprint=0603
T 57600 57800 5 10 1 1 0 0 1
refdes=C38
T 57600 57500 5 10 1 1 180 6 1
value=10u
}
C 67900 57200 1 270 1 capacitor-1.sym
{
T 68600 57400 5 10 0 1 90 2 1
device=CAPACITOR
T 67900 57200 5 10 0 1 0 6 1
footprint=0402
T 68100 57800 5 10 1 1 0 0 1
refdes=C71
T 68100 57500 5 10 1 1 180 6 1
value=100n
}
C 67000 47200 1 270 0 capacitor-1.sym
{
T 67700 47000 5 10 0 1 270 0 1
device=CAPACITOR
T 67000 47200 5 10 0 1 0 0 1
footprint=0402
T 67100 46900 5 10 1 1 0 6 1
refdes=C104
T 67100 46600 5 10 1 1 180 0 1
value=1u
}
C 66500 46700 1 90 0 resistor-2.sym
{
T 66150 47100 5 10 0 1 90 0 1
device=RESISTOR
T 66500 46700 5 10 0 1 0 0 1
footprint=0603
T 66200 47200 5 10 1 1 0 6 1
refdes=R38
T 66200 47100 5 10 1 1 180 0 1
value=1.2k/1%
}
C 66500 45800 1 90 0 resistor-2.sym
{
T 66150 46200 5 10 0 1 90 0 1
device=RESISTOR
T 66500 45800 5 10 0 1 0 0 1
footprint=0603
T 66200 46300 5 10 1 1 0 6 1
refdes=R40
T 66200 46200 5 10 1 1 180 0 1
value=1.2k/1%
}
N 65400 46700 66400 46700 4
N 66400 47600 68000 47600 4
N 66400 45800 68000 45800 4
N 67200 46300 67200 45800 4
N 65400 52100 65400 46700 4
C 66500 47600 1 0 1 vcc.sym
{
T 66500 49300 5 8 0 0 0 6 1
footprint=none
T 66500 49100 5 8 0 0 0 6 1
symversion=1.0
T 66500 47600 5 10 0 1 0 6 1
net=3V3_3:1
T 66300 47700 5 10 1 1 0 6 1
value=3V3_3
}
C 66300 45600 1 0 0 agnd.sym
C 54600 30500 1 0 1 vcc.sym
{
T 54600 32200 5 8 0 0 0 6 1
footprint=none
T 54600 32000 5 8 0 0 0 6 1
symversion=1.0
T 54600 30500 5 10 0 1 0 6 1
net=3V3_2:1
T 54400 30600 5 10 1 1 0 6 1
value=3V3_2
}
C 58100 30500 1 0 1 vcc.sym
{
T 58100 32200 5 8 0 0 0 6 1
footprint=none
T 58100 32000 5 8 0 0 0 6 1
symversion=1.0
T 58100 30500 5 10 0 1 0 6 1
net=5V:1
T 57900 30600 5 10 1 1 0 6 1
value=5V
}
N 67200 47200 67200 47600 4
C 67800 47200 1 270 0 capacitor-1.sym
{
T 68500 47000 5 10 0 1 270 0 1
device=CAPACITOR
T 67800 47200 5 10 0 1 0 0 1
footprint=0402
T 67900 46900 5 10 1 1 0 6 1
refdes=C106
T 67900 46600 5 10 1 1 180 0 1
value=100n
}
N 68000 47600 68000 47200 4
N 68000 45800 68000 46300 4
C 64000 44000 1 180 0 input-1.sym
{
T 64000 43700 5 10 0 0 180 0 1
device=INPUT
T 64000 44000 5 10 0 0 180 0 1
net=TESTSEL0:1
T 64100 43800 5 10 1 1 0 0 1
value=TESTSEL0
}
C 64000 43600 1 180 0 input-1.sym
{
T 64000 43300 5 10 0 0 180 0 1
device=INPUT
T 64000 43600 5 10 0 0 180 0 1
net=TESTSEL1:1
T 64100 43400 5 10 1 1 0 0 1
value=TESTSEL1
}
N 56200 45400 56200 45200 4
N 56200 45200 56800 45200 4
N 56800 45400 56800 45200 4
C 54800 46300 1 0 1 vcc.sym
{
T 54800 48000 5 8 0 0 0 6 1
footprint=none
T 54800 47800 5 8 0 0 0 6 1
symversion=1.0
T 54800 46300 5 10 0 1 0 6 1
net=5V:1
T 54600 46300 5 10 1 1 0 6 1
value=5V
}
C 55000 46200 1 0 0 inductor-1.sym
{
T 55100 46100 5 10 1 1 0 0 1
device=BLM15A
T 55300 46400 5 10 1 1 0 0 1
refdes=L11
T 54500 46000 5 10 0 1 0 0 1
value=BLM15AG121SN1D
T 55000 46200 5 10 0 0 0 0 1
footprint=0402
}
N 54700 46300 55000 46300 4
N 55900 46300 59000 46300 4
C 63400 42400 1 0 0 vcc.sym
{
T 63400 44100 5 8 0 0 0 0 1
footprint=none
T 63400 43900 5 8 0 0 0 0 1
symversion=1.0
T 63400 42400 5 10 0 1 0 0 1
net=5V:1
T 63600 42400 5 10 1 1 0 0 1
value=5V
}
C 61300 43300 1 270 0 capacitor-1.sym
{
T 62000 43100 5 10 0 1 270 0 1
device=CAPACITOR
T 61300 43300 5 10 0 1 180 0 1
footprint=0402
T 61600 43000 5 10 1 1 0 0 1
refdes=C102
T 61600 42700 5 10 1 1 180 6 1
value=100p
}
C 62600 43300 1 270 0 capacitor-1.sym
{
T 63300 43100 5 10 0 1 270 0 1
device=CAPACITOR
T 62600 43300 5 10 0 1 180 0 1
footprint=0402
T 62900 43000 5 10 1 1 0 0 1
refdes=C103
T 62900 42700 5 10 1 1 180 6 1
value=100p
}
N 60900 42400 63500 42400 4
N 60500 43900 63200 43900 4
N 60500 43500 63200 43500 4
N 60900 43300 60900 43900 4
N 61500 43300 61500 43900 4
N 62200 43300 62200 43500 4
N 62800 43300 62800 43500 4
C 72200 46400 1 0 1 LMC7101.sym
{
T 71500 47200 5 10 0 0 0 6 1
device=LMC7101
T 71500 47100 5 10 1 1 0 6 1
refdes=U20
T 71500 47800 5 10 0 0 0 6 1
symversion=0.1
T 71505 47995 5 10 0 0 0 6 1
footprint=SOT25_12345
T 72200 46400 5 10 0 0 0 0 1
value=LMC7101BIM5
}
C 69800 46700 1 0 1 output-1.sym
{
T 69700 47000 5 10 0 0 0 6 1
device=OUTPUT
T 69800 46700 5 10 0 0 0 6 1
net=GAIN:1
T 69600 46500 5 10 1 1 0 6 1
value=GAIN
}
C 71600 47800 1 0 0 vcc.sym
{
T 71600 49500 5 8 0 0 0 0 1
footprint=none
T 71600 49300 5 8 0 0 0 0 1
symversion=1.0
T 71600 47800 5 10 0 1 0 0 1
net=5V_2:1
T 71800 47900 5 10 1 1 0 0 1
value=5V_2
}
N 71700 47800 71700 47200 4
N 71800 47500 71700 47500 4
N 71600 47500 71700 47500 4
C 71800 46100 1 0 1 agnd.sym
N 71700 46300 71700 46400 4
C 70800 46900 1 180 0 resistor-2.sym
{
T 70400 46550 5 10 0 1 180 0 1
device=RESISTOR
T 70300 46700 5 10 1 1 180 0 1
refdes=R48
T 70400 46700 5 10 1 1 180 6 1
value=100
T 70800 46900 5 10 0 1 0 0 1
footprint=0603
}
N 71200 46800 70800 46800 4
C 73000 47600 1 90 1 agnd.sym
C 70400 47400 1 270 1 agnd.sym
N 72200 45900 71100 45900 4
N 71100 46800 71100 45900 4
N 72200 46600 72200 45900 4
N 72200 47000 73500 47000 4
N 73500 38300 73500 47000 4
N 69900 46800 69800 46800 4
N 70700 47500 70600 47500 4
N 72700 47500 72800 47500 4
C 71600 47700 1 180 0 capacitor-1.sym
{
T 71400 47000 5 10 0 1 180 0 1
device=CAPACITOR
T 71600 47700 5 10 0 1 90 0 1
footprint=0402
T 71000 47600 5 10 1 1 0 6 1
refdes=C111
T 71300 47600 5 10 1 1 0 0 1
value=1u
}
C 72700 47700 1 180 0 capacitor-1.sym
{
T 72500 47000 5 10 0 1 180 0 1
device=CAPACITOR
T 72700 47700 5 10 0 1 90 0 1
footprint=0402
T 72100 47600 5 10 1 1 0 6 1
refdes=C114
T 72400 47600 5 10 1 1 0 0 1
value=100n
}
C 64400 51200 1 270 1 capacitor-1.sym
{
T 65100 51400 5 10 0 1 90 2 1
device=CAPACITOR
T 64400 51200 5 10 0 1 0 6 1
footprint=0402
T 64600 51800 5 10 1 1 0 0 1
refdes=C84
T 64600 51500 5 10 1 1 180 6 1
value=100n
}
C 64500 51000 1 0 0 agnd.sym
C 73600 52300 1 180 0 capacitor-1.sym
{
T 73400 51600 5 10 0 1 180 0 1
device=CAPACITOR
T 73600 52300 5 10 0 1 90 0 1
footprint=0402
T 73000 52200 5 10 1 1 0 6 1
refdes=C105
T 73300 52200 5 10 1 1 0 0 1
value=100n
}
C 74000 52000 1 90 0 agnd.sym
N 73800 52100 73600 52100 4
N 72700 52100 72500 52100 4
N 72500 51700 72500 52700 4
C 64800 54400 1 180 0 resistor-2.sym
{
T 64400 54050 5 10 0 1 180 0 1
device=RESISTOR
T 64500 54700 5 10 1 1 180 0 1
refdes=R24
T 64700 53900 5 10 1 1 0 6 1
value=200/1%
T 64800 54400 5 10 0 1 0 0 1
footprint=0603
}
C 64800 53200 1 180 0 resistor-2.sym
{
T 64400 52850 5 10 0 1 180 0 1
device=RESISTOR
T 64500 53500 5 10 1 1 180 0 1
refdes=R26
T 64700 52700 5 10 1 1 0 6 1
value=200/1%
T 64800 53200 5 10 0 1 0 0 1
footprint=0603
}
N 63900 53100 63500 53100 4
N 63500 53100 63500 53300 4
N 64800 53100 65200 53100 4
N 65200 53100 65200 52900 4
N 63900 54300 63500 54300 4
N 63500 54300 63500 54500 4
N 64800 54300 65200 54300 4
N 65200 54300 65200 54100 4
C 44400 41500 1 0 0 LTC6957.sym
{
T 46800 44000 5 10 1 1 0 6 1
refdes=U9
T 45600 43100 5 10 0 0 0 0 1
device=LTC6957
T 45600 43300 5 10 0 0 0 0 1
footprint=MSOP12
T 44400 41500 5 10 0 1 0 0 1
value=LTC6957IMS-4
}
C 43500 42800 1 180 1 input-1.sym
{
T 43500 42500 5 10 0 0 180 6 1
device=INPUT
T 43500 42800 5 10 0 0 180 6 1
net=FILTA:1
T 43400 42600 5 10 1 1 0 6 1
value=FILTA
}
N 44300 42700 44500 42700 4
C 43500 42400 1 180 1 input-1.sym
{
T 43500 42100 5 10 0 0 180 6 1
device=INPUT
T 43500 42400 5 10 0 0 180 6 1
net=FILTB:1
T 43400 42200 5 10 1 1 0 6 1
value=FILTB
}
N 44300 42300 44500 42300 4
C 44300 43300 1 180 0 capacitor-1.sym
{
T 44100 42600 5 10 0 1 180 0 1
device=CAPACITOR
T 44300 43300 5 10 0 1 90 0 1
footprint=0402
T 43700 43200 5 10 1 1 0 6 1
refdes=C43
T 44000 43200 5 10 1 1 0 0 1
value=10n
}
N 44300 43100 44500 43100 4
C 43000 43200 1 270 0 agnd.sym
N 43200 43100 43400 43100 4
N 45400 41600 45400 41400 4
N 45400 41400 46200 41400 4
N 46200 41600 46200 41400 4
C 48100 43200 1 180 0 input-1.sym
{
T 48100 42900 5 10 0 0 180 0 1
device=INPUT
T 48100 43200 5 10 0 0 180 0 1
net=SD1:1
T 48200 43000 5 10 1 1 0 0 1
value=SD1
}
N 47300 43100 47100 43100 4
C 48100 42400 1 180 0 input-1.sym
{
T 48100 42100 5 10 0 0 180 0 1
device=INPUT
T 48100 42400 5 10 0 0 180 0 1
net=SD2:1
T 48200 42200 5 10 1 1 0 0 1
value=SD2
}
N 47300 42300 47100 42300 4
C 46100 45000 1 0 0 vcc.sym
{
T 46100 46700 5 8 0 0 0 0 1
footprint=none
T 46100 46500 5 8 0 0 0 0 1
symversion=1.0
T 46100 45000 5 10 0 1 0 0 1
net=3V3_2:1
T 46300 45100 5 10 1 1 0 0 1
value=3V3_2
}
N 46200 45000 46200 44200 4
N 46400 44600 46200 44600 4
N 44200 44600 44300 44600 4
C 71400 33800 1 0 0 output-1.sym
{
T 71500 34100 5 10 0 0 0 0 1
device=OUTPUT
T 71400 33800 5 10 0 0 0 0 1
net=LED2:1
T 72300 33800 5 10 1 1 0 0 1
value=LED2
}
C 55400 44500 1 0 0 capacitor-1.sym
{
T 55600 45200 5 10 0 1 0 0 1
device=CAPACITOR
T 55400 44500 5 10 0 1 270 0 1
footprint=0402
T 55700 44800 5 10 1 1 0 6 1
refdes=C66
T 56000 44800 5 10 1 1 0 0 1
value=1n
}
C 56300 43700 1 180 0 capacitor-1.sym
{
T 56100 43000 5 10 0 1 180 0 1
device=CAPACITOR
T 56300 43700 5 10 0 1 90 0 1
footprint=0402
T 55700 43600 5 10 1 1 0 6 1
refdes=C76
T 56000 43600 5 10 1 1 0 0 1
value=100p
}
N 54200 43900 54200 46700 4
C 55100 44800 1 270 0 agnd.sym
N 55300 44700 55400 44700 4
C 38800 37800 1 0 0 vcc.sym
{
T 38800 39500 5 8 0 0 0 0 1
footprint=none
T 38800 39300 5 8 0 0 0 0 1
symversion=1.0
T 38800 37800 5 10 0 1 0 0 1
net=PWR:1
T 39000 37800 5 10 1 1 0 0 1
value=PWR
}
C 63000 37200 1 0 0 output-1.sym
{
T 63100 37500 5 10 0 0 0 0 1
device=OUTPUT
T 63000 37200 5 10 0 0 0 0 1
net=SPI_CS3:1
T 63900 37200 5 10 1 1 0 0 1
value=SPI_CS3
}
C 63000 37600 1 0 0 output-1.sym
{
T 63100 37900 5 10 0 0 0 0 1
device=OUTPUT
T 63000 37600 5 10 0 0 0 0 1
net=SPI_CS2:1
T 63900 37600 5 10 1 1 0 0 1
value=SPI_CS2
}
C 71400 34200 1 0 0 output-1.sym
{
T 71500 34500 5 10 0 0 0 0 1
device=OUTPUT
T 71400 34200 5 10 0 0 0 0 1
net=RFSW:1
T 72300 34200 5 10 1 1 0 0 1
value=RFSW
}
C 72200 34800 1 180 0 input-1.sym
{
T 72200 34500 5 10 0 0 180 0 1
device=INPUT
T 72200 34800 5 10 0 0 180 0 1
net=MUXOUT:1
T 72300 34600 5 10 1 1 0 0 1
value=MUXOUT
}
C 71400 37400 1 0 0 output-1.sym
{
T 71500 37700 5 10 0 0 0 0 1
device=OUTPUT
T 71400 37400 5 10 0 0 0 0 1
net=OFDS:1
T 72300 37400 5 10 1 1 0 0 1
value=OFDS
}
C 71400 35800 1 0 0 output-1.sym
{
T 71500 36100 5 10 0 0 0 0 1
device=OUTPUT
T 71400 35800 5 10 0 0 0 0 1
net=SD1:1
T 72300 35800 5 10 1 1 0 0 1
value=SD1
}
C 71400 36200 1 0 0 output-1.sym
{
T 71500 36500 5 10 0 0 0 0 1
device=OUTPUT
T 71400 36200 5 10 0 0 0 0 1
net=SD2:1
T 72300 36200 5 10 1 1 0 0 1
value=SD2
}
C 71400 39400 1 0 0 output-1.sym
{
T 71500 39700 5 10 0 0 0 0 1
device=OUTPUT
T 71400 39400 5 10 0 0 0 0 1
net=VBWCTL:1
T 72300 39400 5 10 1 1 0 0 1
value=VBWCTL
}
C 71400 39000 1 0 0 output-1.sym
{
T 71500 39300 5 10 0 0 0 0 1
device=OUTPUT
T 71400 39000 5 10 0 0 0 0 1
net=VFCTL:1
T 72300 39000 5 10 1 1 0 0 1
value=VFCTL
}
N 41700 39800 39500 39800 4
N 37700 37800 39500 37800 4
C 43800 30100 1 180 0 capacitor-1.sym
{
T 43600 29400 5 10 0 1 180 0 1
device=CAPACITOR
T 43800 30100 5 10 0 1 90 0 1
footprint=0402
T 43200 30000 5 10 1 1 0 6 1
refdes=C87
T 43500 30000 5 10 1 1 0 0 1
value=100p
}
C 42500 30000 1 270 0 agnd.sym
N 42700 29900 42900 29900 4
N 44000 30500 44000 29900 4
N 44000 29900 43800 29900 4
C 48400 30100 1 180 0 capacitor-1.sym
{
T 48200 29400 5 10 0 1 180 0 1
device=CAPACITOR
T 48400 30100 5 10 0 1 90 0 1
footprint=0402
T 47800 30000 5 10 1 1 0 6 1
refdes=C100
T 48100 30000 5 10 1 1 0 0 1
value=100p
}
N 48600 30500 48600 29900 4
N 48600 29900 48400 29900 4
C 47100 30000 1 270 0 agnd.sym
N 47300 29900 47500 29900 4
C 52100 30100 1 180 0 capacitor-1.sym
{
T 51900 29400 5 10 0 1 180 0 1
device=CAPACITOR
T 52100 30100 5 10 0 1 90 0 1
footprint=0402
T 51500 30000 5 10 1 1 0 6 1
refdes=C107
T 51800 30000 5 10 1 1 0 0 1
value=100p
}
N 52300 30500 52300 29900 4
N 52300 29900 52100 29900 4
C 50800 30000 1 270 0 agnd.sym
N 51000 29900 51200 29900 4
C 55600 30100 1 180 0 capacitor-1.sym
{
T 55400 29400 5 10 0 1 180 0 1
device=CAPACITOR
T 55600 30100 5 10 0 1 90 0 1
footprint=0402
T 55000 30000 5 10 1 1 0 6 1
refdes=C115
T 55300 30000 5 10 1 1 0 0 1
value=100p
}
C 54300 30000 1 270 0 agnd.sym
N 54500 29900 54700 29900 4
N 55800 30500 55800 29900 4
N 55800 29900 55600 29900 4
C 59100 30100 1 180 0 capacitor-1.sym
{
T 58900 29400 5 10 0 1 180 0 1
device=CAPACITOR
T 59100 30100 5 10 0 1 90 0 1
footprint=0402
T 58500 30000 5 10 1 1 0 6 1
refdes=C119
T 58800 30000 5 10 1 1 0 0 1
value=100p
}
C 57800 30000 1 270 0 agnd.sym
N 58000 29900 58200 29900 4
N 59300 30500 59300 29900 4
N 59300 29900 59100 29900 4
C 72700 51600 1 0 0 output-1.sym
{
T 72800 51900 5 10 0 0 0 0 1
device=OUTPUT
T 72700 51600 5 10 0 0 0 0 1
net=VCM2:1
T 73500 51600 5 10 1 1 0 0 1
value=VCM2
}
N 72500 51700 72700 51700 4
C 61800 30600 1 180 1 input-1.sym
{
T 61800 30300 5 10 0 0 180 6 1
device=INPUT
T 61800 30600 5 10 0 0 180 6 1
net=VCM2:1
T 61700 30400 5 10 1 1 0 6 1
value=VCM2
}
C 63700 30100 1 180 0 capacitor-1.sym
{
T 63500 29400 5 10 0 1 180 0 1
device=CAPACITOR
T 63700 30100 5 10 0 1 90 0 1
footprint=0402
T 63100 30000 5 10 1 1 0 6 1
refdes=C124
T 63400 30000 5 10 1 1 0 0 1
value=100p
}
C 62400 30000 1 270 0 agnd.sym
N 62600 29900 62800 29900 4
N 63900 29900 63700 29900 4
N 63900 29900 63900 30500 4
C 67400 30100 1 180 0 capacitor-1.sym
{
T 67200 29400 5 10 0 1 180 0 1
device=CAPACITOR
T 67400 30100 5 10 0 1 90 0 1
footprint=0402
T 66800 30000 5 10 1 1 0 6 1
refdes=C125
T 67100 30000 5 10 1 1 0 0 1
value=100p
}
C 66100 30000 1 270 0 agnd.sym
N 66300 29900 66500 29900 4
N 67600 29900 67400 29900 4
N 67600 29900 67600 30500 4
C 71400 30100 1 180 0 capacitor-1.sym
{
T 71200 29400 5 10 0 1 180 0 1
device=CAPACITOR
T 71400 30100 5 10 0 1 90 0 1
footprint=0402
T 70800 30000 5 10 1 1 0 6 1
refdes=C126
T 71100 30000 5 10 1 1 0 0 1
value=100p
}
C 70100 30000 1 270 0 agnd.sym
N 70300 29900 70500 29900 4
N 71600 29900 71400 29900 4
N 71600 30500 71600 29900 4
C 42900 31200 1 180 1 resistor-2.sym
{
T 43300 30850 5 10 0 1 180 6 1
device=RESISTOR
T 42900 31200 5 10 0 1 90 2 1
footprint=0402
T 43300 31300 5 10 1 1 0 6 1
refdes=R28
T 43400 31300 5 10 1 1 0 0 1
value=5.1k/1%
}
N 43800 31100 44000 31100 4
N 44000 31100 44000 30500 4
C 42500 31200 1 270 0 agnd.sym
N 42700 31100 42900 31100 4
C 54700 31200 1 180 1 resistor-2.sym
{
T 55100 30850 5 10 0 1 180 6 1
device=RESISTOR
T 54700 31200 5 10 0 1 90 2 1
footprint=0402
T 55100 31300 5 10 1 1 0 6 1
refdes=R49
T 55200 31300 5 10 1 1 0 0 1
value=5.1k/1%
}
N 55600 31100 55800 31100 4
N 55800 31100 55800 30500 4
C 54300 31200 1 270 0 agnd.sym
N 54500 31100 54700 31100 4
C 66500 31200 1 180 1 resistor-2.sym
{
T 66900 30850 5 10 0 1 180 6 1
device=RESISTOR
T 66500 31200 5 10 0 1 90 2 1
footprint=0402
T 66900 31300 5 10 1 1 0 6 1
refdes=R62
T 67000 31300 5 10 1 1 0 0 1
value=5.1k/1%
}
N 67400 31100 67600 31100 4
N 67600 31100 67600 30500 4
C 66100 31200 1 270 0 agnd.sym
N 66300 31100 66500 31100 4
C 64800 47800 1 90 0 agnd.sym
N 64600 47900 64400 47900 4
C 37600 45300 1 0 0 agnd.sym
N 36400 46200 36700 46200 4
C 39000 46500 1 0 0 output-1.sym
{
T 39100 46800 5 10 0 0 0 0 1
device=OUTPUT
T 39000 46500 5 10 0 0 0 0 1
net=SPI_MISO:1
T 39900 46500 5 10 1 1 0 0 1
value=SPI_MISO
}
N 39000 46600 38700 46600 4
N 36100 46600 36100 51700 4
N 36100 46600 36700 46600 4
C 37600 47500 1 0 0 vcc.sym
{
T 37600 49200 5 8 0 0 0 0 1
footprint=none
T 37600 49000 5 8 0 0 0 0 1
symversion=1.0
T 37600 47500 5 10 0 1 0 0 1
net=5V:1
T 37800 47500 5 10 1 1 0 0 1
value=5V
}
C 73400 38300 1 270 0 resistor-2.sym
{
T 73750 37900 5 10 0 1 270 0 1
device=RESISTOR
T 73300 37900 5 10 1 1 0 6 1
refdes=R66
T 73300 37600 5 10 1 1 0 6 1
value=2k
T 73400 38300 5 10 0 1 90 0 1
footprint=0603
}
C 73400 37200 1 0 0 agnd.sym
C 37900 33800 1 0 0 vcc.sym
{
T 37900 35500 5 8 0 0 0 0 1
footprint=none
T 37900 35300 5 8 0 0 0 0 1
symversion=1.0
T 37900 33800 5 10 0 1 0 0 1
net=3V3_3:1
T 38100 33900 5 10 1 1 0 0 1
value=3V3_3
}
C 37800 32600 1 270 1 capacitor-1.sym
{
T 38500 32800 5 10 0 1 90 2 1
device=CAPACITOR
T 37800 32600 5 10 0 1 0 6 1
footprint=0402
T 38100 33200 5 10 1 1 0 0 1
refdes=C127
T 38100 32900 5 10 1 1 180 6 1
value=1u
}
C 35600 31700 1 90 0 capacitor-1.sym
{
T 34900 31900 5 10 0 1 90 0 1
device=CAPACITOR
T 35600 31700 5 10 0 1 0 0 1
footprint=0603
T 35300 32300 5 10 1 1 0 6 1
refdes=C128
T 35300 32000 5 10 1 1 180 0 1
value=50p
}
C 37900 32300 1 0 0 agnd.sym
N 38000 32500 38000 32600 4
C 35300 31400 1 0 0 agnd.sym
N 35400 31600 35400 31700 4
N 35000 32600 35700 32600 4
N 37700 32600 38000 32600 4
N 37700 33800 38000 33800 4
N 38000 33800 38000 33500 4
C 35000 32500 1 0 1 output-1.sym
{
T 34900 32800 5 10 0 0 0 6 1
device=OUTPUT
T 35000 32500 5 10 0 0 0 6 1
net=SPI_MISO:1
T 34100 32500 5 10 1 1 0 6 1
value=SPI_MISO
}
N 62700 34700 62400 34700 4
N 35400 33800 35700 33800 4
C 34600 33500 1 180 1 input-1.sym
{
T 34600 33200 5 10 0 0 180 6 1
device=INPUT
T 34600 33500 5 10 0 0 180 6 1
net=SPI_CLK:1
T 34500 33300 5 10 1 1 0 6 1
value=SPI_CLK
}
N 35400 33400 35700 33400 4
C 34600 33100 1 180 1 input-1.sym
{
T 34600 32800 5 10 0 0 180 6 1
device=INPUT
T 34600 33100 5 10 0 0 180 6 1
net=SPI_MOSI:1
T 34500 32900 5 10 1 1 0 6 1
value=SPI_MOSI
}
N 35400 33000 35700 33000 4
C 35400 34300 1 180 0 resistor-2.sym
{
T 35000 33950 5 10 0 1 180 0 1
device=RESISTOR
T 34900 34100 5 10 1 1 180 0 1
refdes=R52
T 35000 34100 5 10 1 1 180 6 1
value=10k
T 35400 34300 5 10 0 1 0 0 1
footprint=0402
}
C 34600 34200 1 0 1 vcc.sym
{
T 34600 35900 5 8 0 0 0 6 1
footprint=none
T 34600 35700 5 8 0 0 0 6 1
symversion=1.0
T 34600 34200 5 10 0 1 0 6 1
net=3V3_3:1
T 34400 34300 5 10 1 1 0 6 1
value=3V3_3
}
N 35500 33800 35500 34200 4
N 35500 34200 35400 34200 4
C 35600 32100 1 0 0 AD7814.sym
{
T 37400 34300 5 10 1 1 0 6 1
refdes=U25
T 36000 34500 5 10 0 0 0 0 1
device=AD7814ARTZ
T 36000 34700 5 10 0 0 0 0 1
footprint=SOT26
}
C 67500 32300 1 0 0 LMP92018.sym
{
T 70900 40000 5 10 1 1 0 6 1
refdes=U24
T 69200 36500 5 10 0 0 0 0 1
device=LMP92018
T 69200 36700 5 10 0 0 0 0 1
footprint=LMP92018
}
C 57400 42700 1 0 0 RFSW6042.sym
{
T 60200 45200 5 10 1 1 0 6 1
refdes=U17
T 58800 44300 5 10 0 0 0 0 1
device=RFSW6042
T 58800 44500 5 10 0 0 0 0 1
footprint=RFSW6042
}
N 55400 43500 52000 43500 4
N 56300 43500 57500 43500 4
N 57500 43900 54200 43900 4
N 56300 44700 57500 44700 4
N 49700 44300 57500 44300 4
N 47100 43500 48100 43500 4
N 48100 43500 48100 44300 4
N 48100 44300 48800 44300 4
C 52500 30400 1 0 0 output-1.sym
{
T 52600 30700 5 10 0 0 0 0 1
device=OUTPUT
T 52500 30400 5 10 0 0 0 0 1
net=IN1:1
T 53400 30400 5 10 1 1 0 0 1
value=IN1
}
C 48800 30400 1 0 0 output-1.sym
{
T 48900 30700 5 10 0 0 0 0 1
device=OUTPUT
T 48800 30400 5 10 0 0 0 0 1
net=IN2:1
T 49700 30400 5 10 1 1 0 0 1
value=IN2
}
C 71400 36600 1 0 0 output-1.sym
{
T 71500 36900 5 10 0 0 0 0 1
device=OUTPUT
T 71400 36600 5 10 0 0 0 0 1
net=TESTSEL0:1
T 72300 36600 5 10 1 1 0 0 1
value=TESTSEL0
}
C 71400 37000 1 0 0 output-1.sym
{
T 71500 37300 5 10 0 0 0 0 1
device=OUTPUT
T 71400 37000 5 10 0 0 0 0 1
net=TESTSEL1:1
T 72300 37000 5 10 1 1 0 0 1
value=TESTSEL1
}
N 56700 33500 60400 33500 4
C 71400 35000 1 0 0 output-1.sym
{
T 71500 35300 5 10 0 0 0 0 1
device=OUTPUT
T 71400 35000 5 10 0 0 0 0 1
net=FILTA:1
T 72300 35000 5 10 1 1 0 0 1
value=FILTA
}
C 71400 35400 1 0 0 output-1.sym
{
T 71500 35700 5 10 0 0 0 0 1
device=OUTPUT
T 71400 35400 5 10 0 0 0 0 1
net=FILTB:1
T 72300 35400 5 10 1 1 0 0 1
value=FILTB
}
C 37600 47600 1 180 0 capacitor-1.sym
{
T 37400 46900 5 10 0 1 180 0 1
device=CAPACITOR
T 37600 47600 5 10 0 1 90 0 1
footprint=0402
T 37000 47500 5 10 1 1 0 6 1
refdes=C129
T 37300 47500 5 10 1 1 0 0 1
value=1u
}
N 37700 47500 37700 47300 4
N 37600 47400 37700 47400 4
C 36500 47500 1 270 0 agnd.sym
N 58700 37700 60400 37700 4
N 60400 37300 58300 37300 4
N 60400 38500 57900 38500 4
N 60400 38100 57500 38100 4
N 49700 36000 49700 36400 4
C 41500 36700 1 0 1 vcc.sym
{
T 41500 38400 5 8 0 0 0 6 1
footprint=none
T 41500 38200 5 8 0 0 0 6 1
symversion=1.0
T 41500 36700 5 10 0 1 0 6 1
net=5V_2:1
T 41300 36800 5 10 1 1 0 6 1
value=5V_2
}
C 62700 33400 1 0 0 output-1.sym
{
T 62800 33700 5 10 0 0 0 0 1
device=OUTPUT
T 62700 33400 5 10 0 0 0 0 1
net=SPI_CS4:1
T 63600 33400 5 10 1 1 0 0 1
value=SPI_CS4
}
C 63500 34800 1 180 0 input-1.sym
{
T 63500 34500 5 10 0 0 180 0 1
device=INPUT
T 63500 34800 5 10 0 0 180 0 1
net=SPI_MISO:1
T 63600 34600 5 10 1 1 0 0 1
value=SPI_MISO
}
C 62700 34200 1 0 0 output-1.sym
{
T 62800 34500 5 10 0 0 0 0 1
device=OUTPUT
T 62700 34200 5 10 0 0 0 0 1
net=SPI_MOSI:1
T 63600 34200 5 10 1 1 0 0 1
value=SPI_MOSI
}
C 62700 33800 1 0 0 output-1.sym
{
T 62800 34100 5 10 0 0 0 0 1
device=OUTPUT
T 62700 33800 5 10 0 0 0 0 1
net=SPI_CLK:1
T 63600 33800 5 10 1 1 0 0 1
value=SPI_CLK
}
C 34600 33900 1 180 1 input-1.sym
{
T 34600 33600 5 10 0 0 180 6 1
device=INPUT
T 34600 33900 5 10 0 0 180 6 1
net=SPI_CS2:1
T 34500 33700 5 10 1 1 0 6 1
value=SPI_CS2
}
C 37000 53000 1 180 1 input-1.sym
{
T 37000 52700 5 10 0 0 180 6 1
device=INPUT
T 37000 53000 5 10 0 0 180 6 1
net=SPI_CS0:1
T 36900 52800 5 10 1 1 0 6 1
value=SPI_CS0
}
C 55500 51400 1 180 1 input-1.sym
{
T 55500 51100 5 10 0 0 180 6 1
device=INPUT
T 55500 51400 5 10 0 0 180 6 1
net=SPI_CS1:1
T 55400 51200 5 10 1 1 0 6 1
value=SPI_CS1
}
C 35600 46300 1 180 1 input-1.sym
{
T 35600 46000 5 10 0 0 180 6 1
device=INPUT
T 35600 46300 5 10 0 0 180 6 1
net=SPI_CS0:1
T 35500 46100 5 10 1 1 0 6 1
value=SPI_CS0
}
N 53300 48400 53300 49300 4
N 73800 55800 73800 55700 4
N 73500 52700 72500 52700 4
N 72500 52100 72300 52100 4
N 72300 52900 73200 52900 4
N 73200 52900 73200 53500 4
N 73200 53500 73500 53500 4
N 72300 53300 73000 53300 4
N 73000 53300 73000 54300 4
N 73000 54300 73500 54300 4
N 72300 54100 72700 54100 4
N 72700 54100 72700 55100 4
N 72700 55100 73500 55100 4
N 72300 54500 72500 54500 4
N 72500 54500 72500 56000 4
N 72500 56000 73500 56000 4
C 36600 45400 1 0 0 NL17SZ125.sym
{
T 38400 47100 5 10 1 1 0 6 1
refdes=U2
T 37500 46600 5 10 0 0 0 0 1
device=NL17SZ125DFT2G
T 37500 46800 5 10 0 0 0 0 1
footprint=SC70_5
}