litex

# LiteX BIOS Configuration

LiteX exposes SoC configuration values to the BIOS through generated C
headers. These values are usually created from Python with:

```python
soc.add_config("FOO", value)
```

This generates `CONFIG_FOO` in `generated/soc.h`. If `value` is omitted, the
symbol is generated without a value and can be used with `#ifdef`.

Use `soc.add_config()` for configuration values that are part of the SoC
description and are needed by the BIOS or other LiteX software. Use
`soc.add_constant()` for non-`CONFIG_` constants such as peripheral parameters,
addresses exported to external tools, or feature-specific data.

## Manual BIOS Options

These options can be added by a target or SoC to reduce BIOS output, simulation
time, or boot behavior:

| Config | Effect |
| --- | --- |
| `CONFIG_BIOS_NO_PROMPT` | Do not show the LiteX banner/prompt at boot. |
| `CONFIG_BIOS_NO_DELAYS` | Disable BIOS delay loops. Useful for simulation. |
| `CONFIG_BIOS_NO_BUILD_TIME` | Do not print the C build date/time. Enabled automatically when `compile_software=False`. |
| `CONFIG_BIOS_NO_CRC` | Skip BIOS CRC display/check. Useful on slow simulations. |
| `CONFIG_BIOS_NO_BOOT` | Disable the BIOS boot sequence. |

Example:

```python
self.add_config("BIOS_NO_PROMPT")
self.add_config("BIOS_NO_DELAYS")
```

## BIOS Build Options

Some BIOS options are build flags rather than generated SoC constants:

| Build flag | Effect |
| --- | --- |
| `BIOS_CONSOLE_NO_ANSI` | Build the BIOS console without ANSI escape sequences. |

When using `Builder`, this can be selected with `bios_console_no_ansi=True`.

## Generated SoC Metadata

LiteX generates several `CONFIG_` values from the SoC, CPU, bus and CSR
configuration. These are not normally set manually by targets.

| Config | Meaning |
| --- | --- |
| `CONFIG_PLATFORM_NAME` | Platform name. |
| `CONFIG_CLOCK_FREQUENCY` | SoC system clock frequency in Hz. |
| `CONFIG_CPU_TYPE_<name>` | Selected CPU type. |
| `CONFIG_CPU_VARIANT_<variant>` | Selected CPU variant. |
| `CONFIG_CPU_FAMILY` | CPU family string. |
| `CONFIG_CPU_NAME` | CPU name string. |
| `CONFIG_CPU_HUMAN_NAME` | CPU display name used by the BIOS banner. |
| `CONFIG_CPU_NOP` | CPU no-op instruction used by delay helpers. |
| `CONFIG_CPU_HAS_INTERRUPT` | CPU interrupt support is present. |
| `CONFIG_CPU_INTERRUPTS` | Number of CPU interrupt lines exposed to LiteX software. |
| `CONFIG_CPU_HAS_DMA_BUS` | CPU has a DMA-capable bus. |
| `CONFIG_BUS_STANDARD` | Main SoC bus standard. |
| `CONFIG_BUS_DATA_WIDTH` | Main SoC bus data width. |
| `CONFIG_BUS_ADDRESS_WIDTH` | Main SoC bus address width. |
| `CONFIG_BUS_BURSTING` | Main SoC bus supports bursting. |
| `CONFIG_CSR_DATA_WIDTH` | CSR bus data width. |
| `CONFIG_CSR_ALIGNMENT` | CSR register alignment in bits. |
| `CONFIG_CSR_ORDERING_BIG` | CSR subregister ordering is big-endian style. |
| `CONFIG_CSR_ORDERING_LITTLE` | CSR subregister ordering is little-endian style. |
| `CONFIG_MAIN_RAM_INIT` | Main RAM has an initialization image. |
| `CONFIG_L2_SIZE` | L2 cache size when an L2 cache is present. |
| `CONFIG_HAS_I2C` | At least one LiteX I2C controller is present. |

Some CPU integrations also provide Linux/device-tree metadata, such as
`CONFIG_CPU_COUNT`, `CONFIG_CPU_ISA`, `CONFIG_CPU_MMU`, cache sizes and TLB
sizes. These values are CPU-specific and should be generated by the CPU
integration rather than set manually by targets.

## Peripheral Constants

Peripheral helpers often export additional constants, for example interrupt
numbers, FIFO properties, flash geometry, video framebuffer geometry, Ethernet
slot sizes or local/remote IP address octets. These are part of the relevant
peripheral/software interface and are intentionally not all listed here.

When adding new constants:

- use `CONFIG_` only for SoC-wide build configuration consumed by LiteX
  software;
- keep peripheral-specific constants named after the peripheral or feature;
- prefer explicit names over reusing an existing config symbol with a different
  meaning;
- document software-visible behavior near the core or in the relevant user
  documentation.