librelane

@misc{cherry_opensta_2024,
  title     = {{OpenSTA} {Documentation}},
  url       = {https://github.com/The-OpenROAD-Project/OpenSTA/blob/fbfc705282d102cccbdf3472e86fc9da35268ab5/doc/OpenSTA.pdf},
  publisher = {Parallax Software},
  author    = {Cherry, James},
  year      = {2024}
}

@book{rakesh_chadha_static_2009,
  address    = {Boston, MA},
  title      = {Static {Timing} {Analysis} for {Nanometer} {Designs}: {A} {Practical} {Approach}},
  isbn       = {978-0-387-93819-6 978-0-387-93820-2},
  shorttitle = {Static {Timing} {Analysis} for {Nanometer} {Designs}},
  url        = {https://link.springer.com/10.1007/978-0-387-93820-2},
  language   = {en},
  publisher  = {Springer US},
  author     = {{Rakesh Chadha} and {J. Bhasker}},
  year       = {2009},
  doi        = {10.1007/978-0-387-93820-2},
  file       = {Full Text:/Users/donn/Zotero/storage/57NRMX4G/2009 - Static Timing Analysis for Nanometer Designs A Pr.pdf:application/pdf}
}

@book{gangadharan_constraining_2013,
  address    = {New York, NY},
  title      = {Constraining {Designs} for {Synthesis} and {Timing} {Analysis}: {A} {Practical} {Guide} to {Synopsys} {Design} {Constraints} ({SDC})},
  isbn       = {978-1-4614-3268-5 978-1-4614-3269-2},
  shorttitle = {Constraining {Designs} for {Synthesis} and {Timing} {Analysis}},
  url        = {http://link.springer.com/10.1007/978-1-4614-3269-2},
  language   = {en},
  publisher  = {Springer New York},
  author     = {Gangadharan, Sridhar and Churiwala, Sanjay},
  year       = {2013},
  doi        = {10.1007/978-1-4614-3269-2}
}

@book{kahng_vlsi_2011,
  address    = {Dordrecht},
  title      = {{VLSI} {Physical} {Design}: {From} {Graph} {Partitioning} to {Timing} {Closure}},
  isbn       = {978-90-481-9590-9 978-90-481-9591-6},
  shorttitle = {{VLSI} {Physical} {Design}},
  url        = {https://link.springer.com/10.1007/978-90-481-9591-6},
  language   = {en},
  publisher  = {Springer Netherlands},
  author     = {Kahng, Andrew B. and Lienig, Jens and Markov, Igor L. and Hu, Jin},
  year       = {2011},
  doi        = {10.1007/978-90-481-9591-6},
  file       = {Submitted Version:/Users/donn/Zotero/storage/G4GQ6WMJ/Kahng et al. - 2011 - VLSI Physical Design From Graph Partitioning to T.pdf:application/pdf}
}

@misc{noauthor_cvc_nodate,
  title     = {{CVC} {Verilog} {Simulator}},
  url       = {https://github.com/cambridgehackers/open-src-cvc/},
  publisher = {Tachyon DA}
}