Electronics Design & Simulation Portfolio

by Katherine Feemster

Senior Electronics Design & Simulation (EDA) Specialist · KiCad · LibrePCB · Ngspice · Qucs-s

🌐 Live portfolio site · GitHub repo

Code-first electronics — schematic capture, PCB layout, SPICE characterisation and S-parameter sweeps, all emitted from a single reproducible Python pipeline.

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Contents

• Highlighted projects
• Reproducibility
• Tech stack
• Editorial style
• Repo layout
• About the author
• Contact

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Hero

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Highlighted projects

Project	Stack	What it proves
KiCad ECG analog front-end	KiCad 8 · S-expression	Valid .kicad_pro / .kicad_sch / .kicad_pcb tree with netlist, BOM and fab summary.
LibrePCB portable netlist	LibrePCB 1.x · S-expression	Mirrors the AFE inside LibrePCB's native .lpp project — proves netlist portability.
Ngspice AC / tran / MC / noise	Ngspice 41 · SPICE	Four decks: Bode, transient step, 200-run Monte-Carlo, input-referred noise.
Qucs-s 50 MHz RF band-pass	Qucs-s 2.x · Qucs XML	Dual-π LC matching with S11 Smith chart + S21 mag/phase from 10 MHz to 500 MHz.

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Reproducibility

pip install numpy scipy matplotlib
python3 src/run_all.py

Each case also emits the native project file (KiCad S-expression, LibrePCB .lpp, Ngspice .cir, Qucs XML) so the artefact opens in the real tool unchanged.

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Tech stack

• KiCad 8 — S-expression schematic + PCB, hierarchical sheets, ERC/DRC rule sets, BOM generation, fab-ready output.
• LibrePCB 1.x — Strict .lpp project layout, flattened project library, Wayland-friendly headless rendering for containerised CI.
• Ngspice 41 — Batch SPICE (ngspice -b), AC / DC / TRAN / NOISE / MC, .meas post-processing, vendor-model import.
• Qucs-s 2.x — Qucs XML schematic capture with Ngspice back-end, linear S-parameter sweeps, harmonic balance.
• Python toolchain — ABCD-matrix S-parameter solver, Monte-Carlo sweep harness, scipy.signal reproduction of SPICE transients.

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Editorial style

• Palette — teal #2E7A7B + amber #D9A441 on ink #0F1A1F / paper #FBFAF7.
• Type — Inter (UI) + JetBrains Mono (code, netlists, timecode).
• Determinism — every generator is seeded; PNG, CSV and project-file bytes are stable across CI runs.
• Licensing — every tool in the pipeline is FOSS. No commercial SDK in the dependency tree.

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Repo layout

eda-design-simulation-portfolio/
├── src/                         # 4 generators + art_helpers.py + run_all.py
├── cases/                       # one folder per tool with the native project file
│   ├── kicad/sensor_frontend/   # .kicad_pro / _sch / _pcb / .net / _bom.csv
│   ├── librepcb/                # .lpp project tree
│   ├── ngspice/                 # 4 .cir decks + models/ + run_all.sh
│   └── qucs-s/                  # rf_bandpass.sch + rf_bandpass.ngspice
├── assets/                      # generated posters, CSVs, fab_summary.json
├── docs/                        # GitHub Pages site
└── .github/workflows/           # CI re-runs the pipeline on each push

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About the author

Senior electronics design & simulation specialist shipping cross-tool circuit pipelines — analog front-ends, mixed-signal boards, and RF matching networks. Comfortable owning a project from circuit synthesis through schematic capture, layout, SPICE characterisation, Monte-Carlo yield analysis and S-parameter verification.

Open to remote and contract engagements. This repository is the living portfolio companion to my CV.

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Contact

Katherine Feemster

• GitHub — @katherinejenniferhsfeemster
• Live site — katherinejenniferhsfeemster.github.io/eda-design-simulation-portfolio
• Location — open to remote / contract

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