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(kicad_sch
(version 20260306)
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(uuid "89fee577-1b34-441a-bfeb-caea17ecb845")
(paper "A4")
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(text "Filtering:\n\n\n"
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(text "Input Voltage: 5V-15V(External Source 5V) 5V (USB UART OR USB ESP32) or 3.3V. ONLY USE ONE VOLTAGE INPUT AT A TIME\nOutput Current at 3.3V : 1 A (External Source) 500mA (USB)\nNo Polarity Protection (External Source)\nOvercurrent Protection: None "
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(uuid "2dd1daeb-e862-4398-9780-f25108e6de2b")
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(text "Thermal Vias:\n"
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(at 36.83 75.565 0)
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(text "References:\n\n\n"
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(uuid "48111672-8fad-4436-8905-480ee860e697")
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(text "ESP32 S3 WROOM 1\n\n\n\n"
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(at 29.21 65.405 0)
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(text "ESP32 S3 WROOM 1 datasheet p25 -> 3.3V pin needs a 22uF and a 100nF capacitors. The 22uF doesn't have to be a tantalum capacitor. \n But I will use a tantalum to reuse components\n\nESPS3 Sch -> Automatic Bootloader.\nESPS3 Sch / ESP32 S3 WROOM 1 datasheet p25 -> EN pin 10k resistor and 100nF capacitor\n\nESP32 S3 WROOM 1 datasheet p27 -> GND Thermal needs vias between pads\n"
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(at 40.005 79.375 0)
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(text "Specs:\n\n"
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(uuid "8e486387-a9f3-477e-a352-16c5d86ce086")
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(text "USB C\n\n"
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(at 29.21 89.535 0)
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(uuid "96ad8f9e-1655-49bc-a302-ee7863a0d98f")
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(text "AMS1117-3.3V"
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(at 30.48 157.48 0)
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(text "CP2102 datasheet p15 -> VBUS will be tied to REGIN. 1uF and 100 nF will be added.\nCP2102 datasheet p15 -> ESD Supression Diode I will be skipping it \nCP2102 datasheet p15 and p19 -> 100nF for VDD output, 4.7 uF is optional for higher current circuits.\nCP2102 datasheet p23 -> The VDD or 3.3 output can only provide 100mA. I will not use this as a voltage provider for the ciruit. I will use the AMS1117-3.3 \nCP2102 datasheet p15 -> RST pulled up via 4.7k and SUSPEND~ pulled down via 10k."
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(at 38.735 150.495 0)
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(text "AMS1117 Datasheet p1 -> 3.3V/1A Output with 5-15V Input\nAMS1117 Datasheet p4 -> 22uF tantalum capacitor on input and output.\n"
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(uuid "b43bb4fc-cb9c-49bb-b168-0b137ac5d8a1")
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(text "CP2102\n\n"
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(at 31.115 137.795 0)
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(uuid "d401ba24-51bf-4355-a954-196e031271af")
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(text "Decoupling Capacitors:\n\n"
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(at 36.83 59.69 0)
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(text "USB needs 90 Ohm differential traces. \nUsing JLCPCB's JLC04161H-7628 stackup.\nWhich with Signal Layer (Layer 1) and a GND layer (L2) below. And with 0.2mm tracks and separated 0.15mm gives a differential pair impedance of approximately 90 Ohms.\nFor USB1 will use a very short trace for D+ D- (around 2mm)\nFor USB2 (tracks that go to the internal ESP32 S3 pins and the pinout) the traces are long ~60mm for D+ D-, and have vias\nThe Development board from ESP32S3 has no problem with these differential pairs with vias and is a 2 board layer\nI also have to place vias because of the pinout of USB C and CP2102. Some other people have placed vias without problems for signal integrity"
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(at 39.37 125.73 0)
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(text "Automatic Bootloader:\n\n"
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(text "USB Hardware Design Guidelines for FTDI ICs p8 -> 10nF Cap + Ferrite Bead + 100nF Cap + 4.7uF Cap\nI disregarded such heavy filtering for the easier to implement 1uF and 100nF cap given in the CP2102 datasheet\n"
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(at 39.37 96.52 0)
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(text "Differential pair:\n\n\n"
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(at 37.465 107.95 0)
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