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dvb_fpga

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Design files

Name	Storage	Size
.. / Parent directory
axi_baseband_scrambler_tb.vhd	Git	10.2 KB
axi_bch_encoder_tb.vhd	Git	10.6 KB
axi_bit_interleaver_tb.vhd	Git	20.5 KB
axi_constellation_mapper_tb.vhd

suotoRename decode to decode_config_tuple and update all call sites297a5b7e7

Name	Storage	Size
.. / Parent directory
axi_baseband_scrambler_tb.vhd	Git	10.2 KB
axi_bch_encoder_tb.vhd	Git	10.6 KB
axi_bit_interleaver_tb.vhd	Git	20.5 KB
axi_constellation_mapper_tb.vhd	Git	14.8 KB
axi_file_compare_complex.vhd	Git	12.2 KB
axi_ldpc_encoder_core_tb.vhd	Git	29.7 KB
axi_ldpc_table_tb.vhd	Git	12.3 KB
axi_physical_layer_frame_header_tb.vhd	Git	10.4 KB
axi_physical_layer_framer_tb.vhd	Git	12.2 KB
axi_physical_layer_scrambler_tb.vhd	Git	14.2 KB
dvb_sim_utils_pkg.vhd	Git	8.9 KB
dvbs2_encoder_tb.vhd	Git	31.2 KB