Commits included in published releases. Unpublished intermediate commits are private. Showing matches from the latest 100 commits ending at this release.
feat(pcb): placement engines, reuse placer, and the bench split to copperbench
animesh-chouhan · Sep 24, 2026, 6:28 PM UTC
f88a83cd7f7f
feat(pcb): up to six copper layers (add-multilayer-layout, ADR 0011)
animesh-chouhan · Sep 7, 2026, 6:18 AM UTC
9597b5f407a7
openspec: propose add-multilayer-layout (copper stack, via spans, 4/6-layer profiles, layer-aware engines and scoring, multilayer corpus)
animesh-chouhan · Sep 7, 2026, 5:53 AM UTC
328f5c090f9e
adr: 0010 tough-board probe numbers after the courtyard rule
animesh-chouhan · Sep 7, 2026, 5:22 AM UTC
dd1659187b71
fix(pcb): a footprint with no courtyard takes no part in courtyard overlap, as in KiCad DRC
animesh-chouhan · Sep 7, 2026, 5:08 AM UTC
17fa0bc23ecf
feat(pcb): router-orthoroute behind the contract; minLayers capability; courtyard fix for one-pad footprints (ADR 0010)
animesh-chouhan · Sep 7, 2026, 4:37 AM UTC
50c847d600cf
bench: B4 report (closed loop, eight runs of each track, 23 renders); task 7.7 ticked
animesh-chouhan · Sep 7, 2026, 2:30 AM UTC
b2ab49a40406
fix(pcb): a stage before the last takes at most half of what the run still holds
animesh-chouhan · Sep 7, 2026, 1:12 AM UTC
becc20548eba
fix(pcb): the first pass takes the whole budget again
animesh-chouhan · Sep 7, 2026, 12:51 AM UTC
6bc55418f812
schemas: regenerate for the continue-routing action type
animesh-chouhan · Sep 6, 2026, 11:50 PM UTC
74670de642e0
feat(pcb): continue-routing repair action
animesh-chouhan · Sep 6, 2026, 11:49 PM UTC
ea5d9ce2c607
fix(pcb): the edge rule stage leaves mounting holes where the mechanics put them
animesh-chouhan · Sep 6, 2026, 11:11 PM UTC
241e7a54d405
fix(pcb): a staged run the budget cuts short is judged on the last stage that routed
animesh-chouhan · Sep 6, 2026, 10:52 PM UTC
536905bacc0e
fix(pcb): a staged routing run stays inside its budget
animesh-chouhan · Sep 6, 2026, 10:19 PM UTC
8f7e3b9a8477
fix(pcb): a repairable cycle leaves half the budget for the repair
animesh-chouhan · Sep 6, 2026, 9:21 PM UTC
9cf08ad226cf
fix(pcb): edge rule stage, kct 'declined' kind, owed count and run rollback in the loop (B4 second pass)
animesh-chouhan · Sep 6, 2026, 9:04 PM UTC
04a68d76b6a2
schemas: regenerate RoutingJob for the clearanceNm strategy field
animesh-chouhan · Sep 6, 2026, 8:48 PM UTC
a6c52bb65dff
feat(pcb): generous-first routing and a clearance-margin metric
animesh-chouhan · Sep 6, 2026, 8:43 PM UTC
787019bbfe46
fix(pcb): staged routing keeps one copy of each piece of copper (engines echo preserved wires)
animesh-chouhan · Sep 6, 2026, 8:33 PM UTC
ba124358cb4b
bench: the layout log names each board's render
animesh-chouhan · Sep 6, 2026, 8:29 PM UTC
9d846fddf924
fix(pcb): an outcome with no candidate says why (TIMEOUT, ENGINE_ERROR, UNSUPPORTED) judged on the final-stage invocations; B4 renders folder started
animesh-chouhan · Sep 6, 2026, 8:28 PM UTC
3a4e04d41094
bench: report tolerates candidates without a score
animesh-chouhan · Sep 6, 2026, 7:54 PM UTC
6f707340d251
feat(pcb): every candidate and every loop result gets an SVG beside it; copperbench reports carry a gallery
animesh-chouhan · Sep 6, 2026, 7:54 PM UTC
ce9518014b1f
fix(pcb): the loop keeps the best board across repair cycles; staged routing drops existing copper on a rip-up run
animesh-chouhan · Sep 6, 2026, 7:45 PM UTC
285b502c3f03
readme: the board layout section and the reworded non-goal
animesh-chouhan · Sep 6, 2026, 7:09 PM UTC
ae054b0e020d
bench: reference-boards suite (ten human baselines from PCBench); task 7.5 ticked
animesh-chouhan · Sep 6, 2026, 7:07 PM UTC
d5c010e32c26
bench: layout kind (tracks C and D), suites layout-microboards and repair-pcbench; docs: the layout framework page with the supported envelope and engine setup (Phase 5, 7.5/7.6)
animesh-chouhan · Sep 6, 2026, 7:07 PM UTC
51d79b9a8154
feat(pcb): create stage 5 runs the closed loop before the model's turn; evidence carries the per-subsystem table and repair cycles (Phase 5, 7.3/7.4)
animesh-chouhan · Sep 6, 2026, 7:03 PM UTC
7d8b7d19158e
feat(pcb): the closed loop — repair catalog and planner, layoutBoard, pcb layout, pcb_layout/pcb_repair tools (Phase 5, 7.1/7.2/7.4 core)
animesh-chouhan · Sep 6, 2026, 7:00 PM UTC
62c336fbe3cb
bench: B3 re-taken with the rule stages (10/10 hard intent, 8/8 PASS); pcb render shows intent findings
animesh-chouhan · Sep 6, 2026, 6:54 PM UTC
4824e0c18838
feat(pcb): rule stages for edge, keepout, and separation (Phase 5, 7.0)
animesh-chouhan · Sep 6, 2026, 6:49 PM UTC
835ab9c645f2
bench: B3 report (intent; tracks E/F 8/8 and 13/13; hard intent 6/10 after placement, 90 % not met; §8.3 tripped on the sample, rule stages proposed)
animesh-chouhan · Sep 6, 2026, 6:40 PM UTC
4b8261f3b7f2
feat(pcb): placement runs against intent (Phase 4)
animesh-chouhan · Sep 6, 2026, 6:36 PM UTC
2a02d8210e05
feat(pcb): five §13.3 intent microboards, routing widths and currents in the intent language, copperbench verify kind (tracks E and F)