ClockInACan

update=6/20/2020 12:40:50 PM
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=ClockInACan.net
CopperLayerCount=2
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.1524
MinViaDiameter=0.7111999999999999
MinViaDrill=0.3048
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.254
TrackWidth1=0.1524
TrackWidth2=1.016
ViaDiameter1=0.7112
ViaDrill1=0.3048
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.127
SilkTextSizeV=0.889
SilkTextSizeH=0.889
SilkTextSizeThickness=0.1524
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.1524
CopperTextSizeV=1.524
CopperTextSizeH=1.524
CopperTextThickness=0.3048
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.0508
CourtyardLineWidth=0.0508
OthersLineWidth=0.1524
OthersTextSizeV=1.016
OthersTextSizeH=1.016
OthersTextSizeThickness=0.1524
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0.0508
SolderMaskMinWidth=0.254
SolderPasteClearance=0
SolderPasteRatio=-0